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Switch most MIPS FP load/stores to TCG. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4732 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-06-11 13:02:57 +00:00
parent faf7aaa918
commit aa0bf00b65
3 changed files with 425 additions and 586 deletions
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139
target-mips/op.c
View File

@ -48,103 +48,6 @@
func(arg0, arg1, arg2, arg3)
#endif
#define FREG 0
#include "fop_template.c"
#undef FREG
#define FREG 1
#include "fop_template.c"
#undef FREG
#define FREG 2
#include "fop_template.c"
#undef FREG
#define FREG 3
#include "fop_template.c"
#undef FREG
#define FREG 4
#include "fop_template.c"
#undef FREG
#define FREG 5
#include "fop_template.c"
#undef FREG
#define FREG 6
#include "fop_template.c"
#undef FREG
#define FREG 7
#include "fop_template.c"
#undef FREG
#define FREG 8
#include "fop_template.c"
#undef FREG
#define FREG 9
#include "fop_template.c"
#undef FREG
#define FREG 10
#include "fop_template.c"
#undef FREG
#define FREG 11
#include "fop_template.c"
#undef FREG
#define FREG 12
#include "fop_template.c"
#undef FREG
#define FREG 13
#include "fop_template.c"
#undef FREG
#define FREG 14
#include "fop_template.c"
#undef FREG
#define FREG 15
#include "fop_template.c"
#undef FREG
#define FREG 16
#include "fop_template.c"
#undef FREG
#define FREG 17
#include "fop_template.c"
#undef FREG
#define FREG 18
#include "fop_template.c"
#undef FREG
#define FREG 19
#include "fop_template.c"
#undef FREG
#define FREG 20
#include "fop_template.c"
#undef FREG
#define FREG 21
#include "fop_template.c"
#undef FREG
#define FREG 22
#include "fop_template.c"
#undef FREG
#define FREG 23
#include "fop_template.c"
#undef FREG
#define FREG 24
#include "fop_template.c"
#undef FREG
#define FREG 25
#include "fop_template.c"
#undef FREG
#define FREG 26
#include "fop_template.c"
#undef FREG
#define FREG 27
#include "fop_template.c"
#undef FREG
#define FREG 28
#include "fop_template.c"
#undef FREG
#define FREG 29
#include "fop_template.c"
#undef FREG
#define FREG 30
#include "fop_template.c"
#undef FREG
#define FREG 31
#include "fop_template.c"
#undef FREG
/* Load and store */
#define MEMSUFFIX _raw
#include "op_mem.c"
@ -467,48 +370,6 @@ void op_dmultu (void)
# define DEBUG_FPU_STATE() do { } while(0)
#endif
void op_mfc1 (void)
{
T0 = (int32_t)WT0;
DEBUG_FPU_STATE();
FORCE_RET();
}
void op_mtc1 (void)
{
WT0 = T0;
DEBUG_FPU_STATE();
FORCE_RET();
}
void op_dmfc1 (void)
{
T0 = DT0;
DEBUG_FPU_STATE();
FORCE_RET();
}
void op_dmtc1 (void)
{
DT0 = T0;
DEBUG_FPU_STATE();
FORCE_RET();
}
void op_mfhc1 (void)
{
T0 = (int32_t)WTH0;
DEBUG_FPU_STATE();
FORCE_RET();
}
void op_mthc1 (void)
{
WTH0 = T0;
DEBUG_FPU_STATE();
FORCE_RET();
}
/* Float support.
Single precition routines have a "s" suffix, double precision a
"d" suffix, 32bit integer "w", 64bit integer "l", paired singe "ps",

20
target-mips/op_mem.c
View File

@ -268,26 +268,6 @@ void glue(op_sdr, MEMSUFFIX) (void)
}
#endif /* TARGET_MIPS64 */
void glue(op_lwc1, MEMSUFFIX) (void)
{
WT0 = glue(ldl, MEMSUFFIX)(T0);
FORCE_RET();
}
void glue(op_swc1, MEMSUFFIX) (void)
{
glue(stl, MEMSUFFIX)(T0, WT0);
FORCE_RET();
}
void glue(op_ldc1, MEMSUFFIX) (void)
{
DT0 = glue(ldq, MEMSUFFIX)(T0);
FORCE_RET();
}
void glue(op_sdc1, MEMSUFFIX) (void)
{
glue(stq, MEMSUFFIX)(T0, DT0);
FORCE_RET();
}
void glue(op_luxc1, MEMSUFFIX) (void)
{
DT0 = glue(ldq, MEMSUFFIX)(T0 & ~0x7);

852
target-mips/translate.c
View File

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