target-microblaze: dec_msr: Fix MTS to FSR
Fix moves to FSR. Not only bit 31 is accessible. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@ -533,11 +533,9 @@ static void dec_msr(DisasContext *dc)
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break;
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case SR_EAR:
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case SR_ESR:
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case SR_FSR:
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tcg_gen_mov_i32(cpu_SR[sr], cpu_R[dc->ra]);
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break;
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case 0x7:
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tcg_gen_andi_i32(cpu_SR[SR_FSR], cpu_R[dc->ra], 31);
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break;
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case 0x800:
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tcg_gen_st_i32(cpu_R[dc->ra],
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cpu_env, offsetof(CPUMBState, slr));
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