target/hexagon: Convert to 3-phase reset
Convert the hexagon CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-id: 20221124115023.2437291-6-peter.maydell@linaro.org
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@ -281,14 +281,16 @@ static void hexagon_restore_state_to_opc(CPUState *cs,
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env->gpr[HEX_REG_PC] = data[0];
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env->gpr[HEX_REG_PC] = data[0];
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}
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}
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static void hexagon_cpu_reset(DeviceState *dev)
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static void hexagon_cpu_reset_hold(Object *obj)
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{
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{
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CPUState *cs = CPU(dev);
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CPUState *cs = CPU(obj);
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HexagonCPU *cpu = HEXAGON_CPU(cs);
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HexagonCPU *cpu = HEXAGON_CPU(cs);
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HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(cpu);
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HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(cpu);
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CPUHexagonState *env = &cpu->env;
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CPUHexagonState *env = &cpu->env;
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mcc->parent_reset(dev);
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if (mcc->parent_phases.hold) {
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mcc->parent_phases.hold(obj);
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}
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set_default_nan_mode(1, &env->fp_status);
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set_default_nan_mode(1, &env->fp_status);
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set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status);
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set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status);
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@ -339,11 +341,13 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data)
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HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c);
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HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c);
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CPUClass *cc = CPU_CLASS(c);
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CPUClass *cc = CPU_CLASS(c);
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DeviceClass *dc = DEVICE_CLASS(c);
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DeviceClass *dc = DEVICE_CLASS(c);
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ResettableClass *rc = RESETTABLE_CLASS(c);
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device_class_set_parent_realize(dc, hexagon_cpu_realize,
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device_class_set_parent_realize(dc, hexagon_cpu_realize,
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&mcc->parent_realize);
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&mcc->parent_realize);
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device_class_set_parent_reset(dc, hexagon_cpu_reset, &mcc->parent_reset);
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resettable_class_set_parent_phases(rc, NULL, hexagon_cpu_reset_hold, NULL,
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&mcc->parent_phases);
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cc->class_by_name = hexagon_cpu_class_by_name;
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cc->class_by_name = hexagon_cpu_class_by_name;
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cc->has_work = hexagon_cpu_has_work;
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cc->has_work = hexagon_cpu_has_work;
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@ -137,7 +137,7 @@ typedef struct HexagonCPUClass {
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CPUClass parent_class;
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CPUClass parent_class;
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/*< public >*/
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/*< public >*/
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DeviceRealize parent_realize;
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DeviceRealize parent_realize;
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DeviceReset parent_reset;
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ResettablePhases parent_phases;
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} HexagonCPUClass;
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} HexagonCPUClass;
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struct ArchCPU {
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struct ArchCPU {
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