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target/hexagon: Convert to 3-phase reset 

Convert the hexagon CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-id: 20221124115023.2437291-6-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-11-24 11:50:08 +00:00
parent 1d2eb1c0c5
commit ab85156d8a
2 changed files with 9 additions and 5 deletions
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12
target/hexagon/cpu.c
View File

@ -281,14 +281,16 @@ static void hexagon_restore_state_to_opc(CPUState *cs,
env->gpr[HEX_REG_PC] = data[0];
}
static void hexagon_cpu_reset(DeviceState *dev)
static void hexagon_cpu_reset_hold(Object *obj)
{
CPUState *cs = CPU(dev);
CPUState *cs = CPU(obj);
HexagonCPU *cpu = HEXAGON_CPU(cs);
HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(cpu);
CPUHexagonState *env = &cpu->env;
mcc->parent_reset(dev);
if (mcc->parent_phases.hold) {
mcc->parent_phases.hold(obj);
}
set_default_nan_mode(1, &env->fp_status);
set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status);
@ -339,11 +341,13 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data)
HexagonCPUClass *mcc = HEXAGON_CPU_CLASS(c);
CPUClass *cc = CPU_CLASS(c);
DeviceClass *dc = DEVICE_CLASS(c);
ResettableClass *rc = RESETTABLE_CLASS(c);
device_class_set_parent_realize(dc, hexagon_cpu_realize,
&mcc->parent_realize);
device_class_set_parent_reset(dc, hexagon_cpu_reset, &mcc->parent_reset);
resettable_class_set_parent_phases(rc, NULL, hexagon_cpu_reset_hold, NULL,
&mcc->parent_phases);
cc->class_by_name = hexagon_cpu_class_by_name;
cc->has_work = hexagon_cpu_has_work;

2
target/hexagon/cpu.h
View File

@ -137,7 +137,7 @@ typedef struct HexagonCPUClass {
CPUClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
DeviceReset parent_reset;
ResettablePhases parent_phases;
} HexagonCPUClass;
struct ArchCPU {