target/ppc: unify cpu->has_work based on cs->interrupt_request
Now that cs->interrupt_request indicates if there is any unmasked interrupt, checking if the CPU has work to do can be simplified to a single check that works for all CPU models. Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20221021142156.4134411-3-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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@ -5984,27 +5984,10 @@ int p7_interrupt_powersave(CPUPPCState *env)
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return 0;
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return 0;
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}
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}
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static bool cpu_has_work_POWER7(CPUState *cs)
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = &cpu->env;
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if (cs->halted) {
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if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
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return false;
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}
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return p7_interrupt_powersave(env) != 0;
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} else {
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return FIELD_EX64(env->msr, MSR, EE) &&
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(cs->interrupt_request & CPU_INTERRUPT_HARD);
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}
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}
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POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
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POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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dc->fw_name = "PowerPC,POWER7";
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dc->fw_name = "PowerPC,POWER7";
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dc->desc = "POWER7";
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dc->desc = "POWER7";
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@ -6013,7 +5996,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
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pcc->pcr_supported = PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
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pcc->pcr_supported = PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
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pcc->init_proc = init_proc_POWER7;
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pcc->init_proc = init_proc_POWER7;
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pcc->check_pow = check_pow_nocheck;
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pcc->check_pow = check_pow_nocheck;
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cc->has_work = cpu_has_work_POWER7;
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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@ -6170,27 +6152,10 @@ int p8_interrupt_powersave(CPUPPCState *env)
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return 0;
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return 0;
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}
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}
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static bool cpu_has_work_POWER8(CPUState *cs)
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = &cpu->env;
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if (cs->halted) {
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if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
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return false;
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}
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return p8_interrupt_powersave(env) != 0;
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} else {
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return FIELD_EX64(env->msr, MSR, EE) &&
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(cs->interrupt_request & CPU_INTERRUPT_HARD);
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}
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}
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POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
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POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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dc->fw_name = "PowerPC,POWER8";
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dc->fw_name = "PowerPC,POWER8";
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dc->desc = "POWER8";
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dc->desc = "POWER8";
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@ -6199,7 +6164,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
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pcc->pcr_supported = PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
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pcc->pcr_supported = PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
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pcc->init_proc = init_proc_POWER8;
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pcc->init_proc = init_proc_POWER8;
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pcc->check_pow = check_pow_nocheck;
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pcc->check_pow = check_pow_nocheck;
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cc->has_work = cpu_has_work_POWER8;
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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@ -6407,35 +6371,10 @@ int p9_interrupt_powersave(CPUPPCState *env)
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return 0;
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return 0;
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}
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}
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static bool cpu_has_work_POWER9(CPUState *cs)
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = &cpu->env;
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if (cs->halted) {
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uint64_t psscr = env->spr[SPR_PSSCR];
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if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
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return false;
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}
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/* If EC is clear, just return true on any pending interrupt */
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if (!(psscr & PSSCR_EC)) {
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return true;
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}
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return p9_interrupt_powersave(env) != 0;
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} else {
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return FIELD_EX64(env->msr, MSR, EE) &&
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(cs->interrupt_request & CPU_INTERRUPT_HARD);
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}
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}
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POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
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POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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dc->fw_name = "PowerPC,POWER9";
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dc->fw_name = "PowerPC,POWER9";
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dc->desc = "POWER9";
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dc->desc = "POWER9";
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@ -6445,7 +6384,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
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PCR_COMPAT_2_05;
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PCR_COMPAT_2_05;
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pcc->init_proc = init_proc_POWER9;
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pcc->init_proc = init_proc_POWER9;
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pcc->check_pow = check_pow_nocheck;
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pcc->check_pow = check_pow_nocheck;
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cc->has_work = cpu_has_work_POWER9;
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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@ -6604,35 +6542,10 @@ static bool ppc_pvr_match_power10(PowerPCCPUClass *pcc, uint32_t pvr, bool best)
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return false;
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return false;
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}
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}
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static bool cpu_has_work_POWER10(CPUState *cs)
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = &cpu->env;
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if (cs->halted) {
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uint64_t psscr = env->spr[SPR_PSSCR];
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if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
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return false;
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}
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/* If EC is clear, just return true on any pending interrupt */
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if (!(psscr & PSSCR_EC)) {
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return true;
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}
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return p9_interrupt_powersave(env) != 0;
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} else {
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return FIELD_EX64(env->msr, MSR, EE) &&
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(cs->interrupt_request & CPU_INTERRUPT_HARD);
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}
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}
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POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
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POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
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{
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(oc);
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dc->fw_name = "PowerPC,POWER10";
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dc->fw_name = "PowerPC,POWER10";
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dc->desc = "POWER10";
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dc->desc = "POWER10";
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@ -6643,7 +6556,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
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PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
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PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
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pcc->init_proc = init_proc_POWER10;
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pcc->init_proc = init_proc_POWER10;
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pcc->check_pow = check_pow_nocheck;
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pcc->check_pow = check_pow_nocheck;
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cc->has_work = cpu_has_work_POWER10;
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
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@ -7216,11 +7128,7 @@ static void ppc_restore_state_to_opc(CPUState *cs,
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static bool ppc_cpu_has_work(CPUState *cs)
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static bool ppc_cpu_has_work(CPUState *cs)
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{
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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CPUPPCState *env = &cpu->env;
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return FIELD_EX64(env->msr, MSR, EE) &&
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(cs->interrupt_request & CPU_INTERRUPT_HARD);
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}
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}
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static void ppc_cpu_reset(DeviceState *dev)
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static void ppc_cpu_reset(DeviceState *dev)
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