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target/loongarch; Implement xvdiv/xvmod

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This patch includes:
- XVDIV.{B/H/W/D}[U];
- XVMOD.{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-28-gaosong@loongson.cn>
This commit is contained in:
Song Gao 2023-09-14 10:26:15 +08:00
parent 3f450c17d0
commit abb693de0a
No known key found for this signature in database
GPG Key ID: 40A2FFF239263EDF
4 changed files with 53 additions and 1 deletions
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17
target/loongarch/disas.c
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@ -1962,6 +1962,23 @@ INSN_LASX(xvmaddwod_w_hu_h, vvv)
INSN_LASX(xvmaddwod_d_wu_w, vvv)
INSN_LASX(xvmaddwod_q_du_d, vvv)
INSN_LASX(xvdiv_b, vvv)
INSN_LASX(xvdiv_h, vvv)
INSN_LASX(xvdiv_w, vvv)
INSN_LASX(xvdiv_d, vvv)
INSN_LASX(xvdiv_bu, vvv)
INSN_LASX(xvdiv_hu, vvv)
INSN_LASX(xvdiv_wu, vvv)
INSN_LASX(xvdiv_du, vvv)
INSN_LASX(xvmod_b, vvv)
INSN_LASX(xvmod_h, vvv)
INSN_LASX(xvmod_w, vvv)
INSN_LASX(xvmod_d, vvv)
INSN_LASX(xvmod_bu, vvv)
INSN_LASX(xvmod_hu, vvv)
INSN_LASX(xvmod_wu, vvv)
INSN_LASX(xvmod_du, vvv)
INSN_LASX(xvreplgr2vr_b, vr)
INSN_LASX(xvreplgr2vr_h, vr)
INSN_LASX(xvreplgr2vr_w, vr)

16
target/loongarch/insn_trans/trans_vec.c.inc
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@ -3199,6 +3199,22 @@ TRANS(vmod_bu, LSX, gen_vvv, gen_helper_vmod_bu)
TRANS(vmod_hu, LSX, gen_vvv, gen_helper_vmod_hu)
TRANS(vmod_wu, LSX, gen_vvv, gen_helper_vmod_wu)
TRANS(vmod_du, LSX, gen_vvv, gen_helper_vmod_du)
TRANS(xvdiv_b, LASX, gen_xxx, gen_helper_vdiv_b)
TRANS(xvdiv_h, LASX, gen_xxx, gen_helper_vdiv_h)
TRANS(xvdiv_w, LASX, gen_xxx, gen_helper_vdiv_w)
TRANS(xvdiv_d, LASX, gen_xxx, gen_helper_vdiv_d)
TRANS(xvdiv_bu, LASX, gen_xxx, gen_helper_vdiv_bu)
TRANS(xvdiv_hu, LASX, gen_xxx, gen_helper_vdiv_hu)
TRANS(xvdiv_wu, LASX, gen_xxx, gen_helper_vdiv_wu)
TRANS(xvdiv_du, LASX, gen_xxx, gen_helper_vdiv_du)
TRANS(xvmod_b, LASX, gen_xxx, gen_helper_vmod_b)
TRANS(xvmod_h, LASX, gen_xxx, gen_helper_vmod_h)
TRANS(xvmod_w, LASX, gen_xxx, gen_helper_vmod_w)
TRANS(xvmod_d, LASX, gen_xxx, gen_helper_vmod_d)
TRANS(xvmod_bu, LASX, gen_xxx, gen_helper_vmod_bu)
TRANS(xvmod_hu, LASX, gen_xxx, gen_helper_vmod_hu)
TRANS(xvmod_wu, LASX, gen_xxx, gen_helper_vmod_wu)
TRANS(xvmod_du, LASX, gen_xxx, gen_helper_vmod_du)
static void gen_vsat_s(unsigned vece, TCGv_vec t, TCGv_vec a, TCGv_vec max)
{

17
target/loongarch/insns.decode
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@ -1545,6 +1545,23 @@ xvmaddwod_w_hu_h 0111 01001011 11101 ..... ..... ..... @vvv
xvmaddwod_d_wu_w 0111 01001011 11110 ..... ..... ..... @vvv
xvmaddwod_q_du_d 0111 01001011 11111 ..... ..... ..... @vvv
xvdiv_b 0111 01001110 00000 ..... ..... ..... @vvv
xvdiv_h 0111 01001110 00001 ..... ..... ..... @vvv
xvdiv_w 0111 01001110 00010 ..... ..... ..... @vvv
xvdiv_d 0111 01001110 00011 ..... ..... ..... @vvv
xvmod_b 0111 01001110 00100 ..... ..... ..... @vvv
xvmod_h 0111 01001110 00101 ..... ..... ..... @vvv
xvmod_w 0111 01001110 00110 ..... ..... ..... @vvv
xvmod_d 0111 01001110 00111 ..... ..... ..... @vvv
xvdiv_bu 0111 01001110 01000 ..... ..... ..... @vvv
xvdiv_hu 0111 01001110 01001 ..... ..... ..... @vvv
xvdiv_wu 0111 01001110 01010 ..... ..... ..... @vvv
xvdiv_du 0111 01001110 01011 ..... ..... ..... @vvv
xvmod_bu 0111 01001110 01100 ..... ..... ..... @vvv
xvmod_hu 0111 01001110 01101 ..... ..... ..... @vvv
xvmod_wu 0111 01001110 01110 ..... ..... ..... @vvv
xvmod_du 0111 01001110 01111 ..... ..... ..... @vvv
xvreplgr2vr_b 0111 01101001 11110 00000 ..... ..... @vr
xvreplgr2vr_h 0111 01101001 11110 00001 ..... ..... @vr
xvreplgr2vr_w 0111 01101001 11110 00010 ..... ..... @vr

4
target/loongarch/vec_helper.c
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@ -653,7 +653,9 @@ void HELPER(NAME)(void *vd, void *vj, void *vk, uint32_t desc) \
VReg *Vd = (VReg *)vd; \
VReg *Vj = (VReg *)vj; \
VReg *Vk = (VReg *)vk; \
for (i = 0; i < LSX_LEN/BIT; i++) { \
int oprsz = simd_oprsz(desc); \
\
for (i = 0; i < oprsz / (BIT / 8); i++) { \
Vd->E(i) = DO_OP(Vj->E(i), Vk->E(i)); \
} \
}