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meson: target

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Similar to hw_arch, each architecture defines two sourceset which are placed in
dictionaries target_arch and target_softmmu_arch.  These are then picked up
from there when building the per-emulator static_library.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2020-08-07 12:10:23 +02:00
parent 2c44220d05
commit abff1abfe8
62 changed files with 595 additions and 328 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Makefile.target
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@ -116,7 +116,6 @@ obj-$(CONFIG_TCG) += tcg/tcg-common.o tcg/optimize.o
obj-$(CONFIG_TCG_INTERPRETER) += tcg/tci.o
obj-$(CONFIG_TCG_INTERPRETER) += disas/tci.o
obj-$(CONFIG_TCG) += fpu/softfloat.o
obj-y += target/$(TARGET_BASE_ARCH)/
obj-y += disas.o
obj-$(call notempty,$(TARGET_XML_FILES)) += gdbstub-xml.o
LIBS := $(libs_cpu) $(LIBS)
@ -168,7 +167,7 @@ LIBS := $(LIBS) $(BRLAPI_LIBS) $(SDL_LIBS) $(SPICE_LIBS) $(OPENGL_LIBS) $(SECCOM
LIBS := $(LIBS) $(COREAUDIO_LIBS) $(DSOUND_LIBS)
LIBS := $(LIBS) $(VDE_LIBS) $(SLIRP_LIBS)
LIBS := $(LIBS) $(LIBUSB_LIBS) $(SMARTCARD_LIBS) $(USB_REDIR_LIBS)
LIBS := $(LIBS) $(VIRGL_LIBS)
LIBS := $(LIBS) $(VIRGL_LIBS) $(CURSES_LIBS)
generated-files-y += hmp-commands.h hmp-commands-info.h

5
libdecnumber/Makefile.objs
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@ -1,5 +0,0 @@
obj-y += decContext.o
obj-y += decNumber.o
obj-y += dpd/decimal32.o
obj-y += dpd/decimal64.o
obj-y += dpd/decimal128.o

7
libdecnumber/meson.build Normal file
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@ -0,0 +1,7 @@
libdecnumber = files(
'decContext.c',
'decNumber.c',
'dpd/decimal128.c',
'dpd/decimal32.c',
'dpd/decimal64.c',
)

11
meson.build
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@ -647,10 +647,15 @@ libqemuutil = static_library('qemuutil',
qemuutil = declare_dependency(link_with: libqemuutil,
sources: genh + version_res)
decodetree = generator(find_program('scripts/decodetree.py'),
output: 'decode-@BASENAME@.c.inc',
arguments: ['@INPUT@', '@EXTRA_ARGS@', '-o', '@OUTPUT@'])
subdir('audio')
subdir('io')
subdir('chardev')
subdir('fsdev')
subdir('libdecnumber')
subdir('target')
subdir('dump')
@ -787,6 +792,9 @@ foreach target : target_dirs
if target.endswith('-softmmu')
qemu_target_name = 'qemu-system-' + target_name
target_type='system'
t = target_softmmu_arch[arch].apply(config_target, strict: false)
arch_srcs += t.sources()
hw_dir = target_name == 'sparc64' ? 'sparc64' : arch
hw = hw_arch[hw_dir].apply(config_target, strict: false)
arch_srcs += hw.sources()
@ -807,6 +815,9 @@ foreach target : target_dirs
)
endif
t = target_arch[arch].apply(config_target, strict: false)
arch_srcs += t.sources()
target_common = common_ss.apply(config_target, strict: false)
objects = common_all.extract_objects(target_common.sources())

2
scripts/decodetree.py Executable file → Normal file
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@ -1257,7 +1257,7 @@ def main():
long_opts = ['decode=', 'translate=', 'output=', 'insnwidth=',
'static-decode=', 'varinsnwidth=']
try:
(opts, args) = getopt.getopt(sys.argv[1:], 'o:vw:', long_opts)
(opts, args) = getopt.gnu_getopt(sys.argv[1:], 'o:vw:', long_opts)
except getopt.GetoptError as err:
error(0, err)
for o, a in opts:

4
target/alpha/Makefile.objs
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@ -1,4 +0,0 @@
obj-$(CONFIG_SOFTMMU) += machine.o
obj-y += translate.o helper.o cpu.o
obj-y += int_helper.o fpu_helper.o vax_helper.o sys_helper.o mem_helper.o
obj-y += gdbstub.o

18
target/alpha/meson.build Normal file
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@ -0,0 +1,18 @@
alpha_ss = ss.source_set()
alpha_ss.add(files(
'cpu.c',
'fpu_helper.c',
'gdbstub.c',
'helper.c',
'int_helper.c',
'mem_helper.c',
'sys_helper.c',
'translate.c',
'vax_helper.c',
))
alpha_softmmu_ss = ss.source_set()
alpha_softmmu_ss.add(files('machine.c'))
target_arch += {'alpha': alpha_ss}
target_softmmu_arch += {'alpha': alpha_softmmu_ss}

89
target/arm/Makefile.objs
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@ -1,89 +0,0 @@
obj-$(CONFIG_TCG) += arm-semi.o
obj-y += helper.o vfp_helper.o
obj-y += cpu.o gdbstub.o
obj-$(TARGET_AARCH64) += cpu64.o gdbstub64.o
obj-$(CONFIG_SOFTMMU) += machine.o arch_dump.o monitor.o
obj-$(CONFIG_SOFTMMU) += arm-powerctl.o
obj-$(CONFIG_KVM) += kvm.o
obj-$(call land,$(CONFIG_KVM),$(call lnot,$(TARGET_AARCH64))) += kvm32.o
obj-$(call land,$(CONFIG_KVM),$(TARGET_AARCH64)) += kvm64.o
obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
target/arm/decode-sve.c.inc: $(SRC_PATH)/target/arm/sve.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --decode disas_sve -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-neon-shared.c.inc: $(SRC_PATH)/target/arm/neon-shared.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_neon_shared -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-neon-dp.c.inc: $(SRC_PATH)/target/arm/neon-dp.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_neon_dp -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-neon-ls.c.inc: $(SRC_PATH)/target/arm/neon-ls.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_neon_ls -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-vfp.c.inc: $(SRC_PATH)/target/arm/vfp.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_vfp -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-vfp-uncond.c.inc: $(SRC_PATH)/target/arm/vfp-uncond.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_vfp_uncond -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-a32.c.inc: $(SRC_PATH)/target/arm/a32.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_a32 -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-a32-uncond.c.inc: $(SRC_PATH)/target/arm/a32-uncond.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_a32_uncond -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-t32.c.inc: $(SRC_PATH)/target/arm/t32.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_t32 -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-t16.c.inc: $(SRC_PATH)/target/arm/t16.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) -w 16 --static-decode disas_t16 -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/translate-sve.o: target/arm/decode-sve.c.inc
target/arm/translate.o: target/arm/decode-neon-shared.c.inc
target/arm/translate.o: target/arm/decode-neon-dp.c.inc
target/arm/translate.o: target/arm/decode-neon-ls.c.inc
target/arm/translate.o: target/arm/decode-vfp.c.inc
target/arm/translate.o: target/arm/decode-vfp-uncond.c.inc
target/arm/translate.o: target/arm/decode-a32.c.inc
target/arm/translate.o: target/arm/decode-a32-uncond.c.inc
target/arm/translate.o: target/arm/decode-t32.c.inc
target/arm/translate.o: target/arm/decode-t16.c.inc
obj-y += tlb_helper.o debug_helper.o
obj-y += translate.o op_helper.o
obj-y += crypto_helper.o
obj-y += iwmmxt_helper.o vec_helper.o neon_helper.o
obj-y += m_helper.o
obj-y += cpu_tcg.o
obj-$(CONFIG_SOFTMMU) += psci.o
obj-$(TARGET_AARCH64) += translate-a64.o helper-a64.o
obj-$(TARGET_AARCH64) += translate-sve.o sve_helper.o
obj-$(TARGET_AARCH64) += pauth_helper.o
obj-$(TARGET_AARCH64) += mte_helper.o

62
target/arm/meson.build Normal file
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@ -0,0 +1,62 @@
gen = [
decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
decodetree.process('neon-shared.decode', extra_args: '--static-decode=disas_neon_shared'),
decodetree.process('neon-dp.decode', extra_args: '--static-decode=disas_neon_dp'),
decodetree.process('neon-ls.decode', extra_args: '--static-decode=disas_neon_ls'),
decodetree.process('vfp.decode', extra_args: '--static-decode=disas_vfp'),
decodetree.process('vfp-uncond.decode', extra_args: '--static-decode=disas_vfp_uncond'),
decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
]
arm_ss = ss.source_set()
arm_ss.add(gen)
arm_ss.add(files(
'cpu.c',
'crypto_helper.c',
'debug_helper.c',
'gdbstub.c',
'helper.c',
'iwmmxt_helper.c',
'm_helper.c',
'neon_helper.c',
'op_helper.c',
'tlb_helper.c',
'translate.c',
'vec_helper.c',
'vfp_helper.c',
'cpu_tcg.c',
))
arm_ss.add(zlib)
arm_ss.add(when: 'CONFIG_TCG', if_true: files('arm-semi.c'))
kvm_ss = ss.source_set()
kvm_ss.add(when: 'TARGET_AARCH64', if_true: files('kvm64.c'), if_false: files('kvm32.c'))
arm_ss.add_all(when: 'CONFIG_KVM', if_true: kvm_ss)
arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
'cpu64.c',
'gdbstub64.c',
'helper-a64.c',
'mte_helper.c',
'pauth_helper.c',
'sve_helper.c',
'translate-a64.c',
'translate-sve.c',
))
arm_softmmu_ss = ss.source_set()
arm_softmmu_ss.add(files(
'arch_dump.c',
'arm-powerctl.c',
'machine.c',
'monitor.c',
'psci.c',
))
target_arch += {'arm': arm_ss}
target_softmmu_arch += {'arm': arm_softmmu_ss}

34
target/avr/Makefile.objs
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@ -1,34 +0,0 @@
#
# QEMU AVR
#
# Copyright (c) 2016-2020 Michael Rolnik
#
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
#
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
# Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, see
# <http://www.gnu.org/licenses/lgpl-2.1.html>
#
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
decode-y = $(SRC_PATH)/target/avr/insn.decode
target/avr/decode_insn.c.inc: $(decode-y) $(DECODETREE)
$(call quiet-command, \
$(PYTHON) $(DECODETREE) -o $@ --decode decode_insn --insnwidth 16 $<, \
"GEN", $(TARGET_DIR)$@)
target/avr/translate.o: target/avr/decode_insn.c.inc
obj-y += translate.o cpu.o helper.o
obj-y += gdbstub.o
obj-y += disas.o
obj-$(CONFIG_SOFTMMU) += machine.o

2
target/avr/disas.c
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@ -60,7 +60,7 @@ static int append_16(DisasContext *ctx, int x)
/* Include the auto-generated decoder. */
static bool decode_insn(DisasContext *ctx, uint16_t insn);
#include "decode_insn.c.inc"
#include "decode-insn.c.inc"
#define output(mnemonic, format, ...) \
(pctx->info->fprintf_func(pctx->info->stream, "%-9s " format, \

20
target/avr/meson.build Normal file
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@ -0,0 +1,20 @@
gen = [
decodetree.process('insn.decode', extra_args: [ '--decode', 'decode_insn',
'--insnwidth', '16' ])
]
avr_ss = ss.source_set()
avr_softmmu_ss = ss.source_set()
avr_ss.add(gen)
avr_ss.add(files(
'translate.c',
'helper.c',
'cpu.c',
'gdbstub.c',
'disas.c'))
avr_softmmu_ss.add(files('machine.c'))
target_arch += {'avr': avr_ss}
target_softmmu_arch += {'avr': avr_softmmu_ss}

2
target/avr/translate.c
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@ -198,7 +198,7 @@ static bool avr_have_feature(DisasContext *ctx, int feature)
}
static bool decode_insn(DisasContext *ctx, uint16_t insn);
#include "decode_insn.c.inc"
#include "decode-insn.c.inc"
/*
* Arithmetic Instructions

3
target/cris/Makefile.objs
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@ -1,3 +0,0 @@
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += gdbstub.o
obj-$(CONFIG_SOFTMMU) += mmu.o machine.o

14
target/cris/meson.build Normal file
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@ -0,0 +1,14 @@
cris_ss = ss.source_set()
cris_ss.add(files(
'cpu.c',
'gdbstub.c',
'helper.c',
'op_helper.c',
'translate.c',
))
cris_softmmu_ss = ss.source_set()
cris_softmmu_ss.add(files('mmu.c', 'machine.c'))
target_arch += {'cris': cris_ss}
target_softmmu_arch += {'cris': cris_softmmu_ss}

11
target/hppa/Makefile.objs
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@ -1,11 +0,0 @@
obj-y += translate.o helper.o cpu.o op_helper.o gdbstub.o mem_helper.o
obj-y += int_helper.o
obj-$(CONFIG_SOFTMMU) += machine.o
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
target/hppa/decode.c.inc: $(SRC_PATH)/target/hppa/insns.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) -o $@ $<, "GEN", $(TARGET_DIR)$@)
target/hppa/translate.o: target/hppa/decode.c.inc

19
target/hppa/meson.build Normal file
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@ -0,0 +1,19 @@
gen = decodetree.process('insns.decode')
hppa_ss = ss.source_set()
hppa_ss.add(gen)
hppa_ss.add(files(
'cpu.c',
'gdbstub.c',
'helper.c',
'int_helper.c',
'mem_helper.c',
'op_helper.c',
'translate.c',
))
hppa_softmmu_ss = ss.source_set()
hppa_softmmu_ss.add(files('machine.c'))
target_arch += {'hppa': hppa_ss}
target_softmmu_arch += {'hppa': hppa_softmmu_ss}

2
target/hppa/translate.c
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@ -334,7 +334,7 @@ static int expand_shl11(DisasContext *ctx, int val)
/* Include the auto-generated decoder. */
#include "decode.c.inc"
#include "decode-insns.c.inc"
/* We are not using a goto_tb (for whatever reason), but have updated
the iaq (for whatever reason), so don't do it again on exit. */

23
target/i386/Makefile.objs
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@ -1,23 +0,0 @@
obj-y += helper.o cpu.o gdbstub.o xsave_helper.o
obj-$(CONFIG_TCG) += translate.o
obj-$(CONFIG_TCG) += bpt_helper.o cc_helper.o excp_helper.o fpu_helper.o
obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o mpx_helper.o
obj-$(CONFIG_TCG) += seg_helper.o smm_helper.o svm_helper.o
obj-$(call lnot,$(CONFIG_TCG)) += tcg-stub.o
obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
ifeq ($(CONFIG_SOFTMMU),y)
obj-y += machine.o arch_memory_mapping.o arch_dump.o monitor.o
obj-$(CONFIG_KVM) += kvm.o
obj-$(CONFIG_HYPERV) += hyperv.o
obj-$(call lnot,$(CONFIG_HYPERV)) += hyperv-stub.o
ifeq ($(CONFIG_WIN32),y)
obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-windows.o
endif
ifeq ($(CONFIG_POSIX),y)
obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-posix.o
endif
obj-$(CONFIG_HVF) += hvf/
obj-$(CONFIG_WHPX) += whpx-all.o
endif
obj-$(CONFIG_SEV) += sev.o
obj-$(call lnot,$(CONFIG_SEV)) += sev-stub.o

2
target/i386/hvf/Makefile.objs
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@ -1,2 +0,0 @@
obj-y += hvf.o
obj-y += x86.o x86_cpuid.o x86_decode.o x86_descr.o x86_emu.o x86_flags.o x86_mmu.o x86hvf.o x86_task.o

12
target/i386/hvf/meson.build Normal file
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@ -0,0 +1,12 @@
i386_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
'hvf.c',
'x86.c',
'x86_cpuid.c',
'x86_decode.c',
'x86_descr.c',
'x86_emu.c',
'x86_flags.c',
'x86_mmu.c',
'x86_task.c',
'x86hvf.c',
))

40
target/i386/meson.build Normal file
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@ -0,0 +1,40 @@
i386_ss = ss.source_set()
i386_ss.add(files(
'cpu.c',
'gdbstub.c',
'helper.c',
'xsave_helper.c',
))
i386_ss.add(when: 'CONFIG_TCG', if_true: files(
'bpt_helper.c',
'cc_helper.c',
'excp_helper.c',
'fpu_helper.c',
'int_helper.c',
'mem_helper.c',
'misc_helper.c',
'mpx_helper.c',
'seg_helper.c',
'smm_helper.c',
'svm_helper.c',
'translate.c'), if_false: files('tcg-stub.c'))
i386_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c'))
i386_ss.add(when: 'CONFIG_SEV', if_true: files('sev.c'), if_false: files('sev-stub.c'))
i386_softmmu_ss = ss.source_set()
i386_softmmu_ss.add(files(
'arch_dump.c',
'arch_memory_mapping.c',
'machine.c',
'monitor.c',
))
i386_softmmu_ss.add(when: 'CONFIG_HYPERV', if_true: files('hyperv.c'), if_false: files('hyperv-stub.c'))
i386_softmmu_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
i386_softmmu_ss.add(when: 'CONFIG_WHPX', if_true: files('whpx-all.c'))
i386_softmmu_ss.add(when: ['CONFIG_POSIX', 'CONFIG_HAX'], if_true: files('hax-all.c', 'hax-mem.c', 'hax-posix.c'))
i386_softmmu_ss.add(when: ['CONFIG_WIN32', 'CONFIG_HAX'], if_true: files('hax-all.c', 'hax-mem.c', 'hax-windows.c'))
subdir('hvf')
target_arch += {'i386': i386_ss}
target_softmmu_arch += {'i386': i386_softmmu_ss}

4
target/lm32/Makefile.objs
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@ -1,4 +0,0 @@
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += gdbstub.o
obj-y += lm32-semi.o
obj-$(CONFIG_SOFTMMU) += machine.o

15
target/lm32/meson.build Normal file
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@ -0,0 +1,15 @@
lm32_ss = ss.source_set()
lm32_ss.add(files(
'cpu.c',
'gdbstub.c',
'helper.c',
'lm32-semi.c',
'op_helper.c',
'translate.c',
))
lm32_softmmu_ss = ss.source_set()
lm32_softmmu_ss.add(files('machine.c'))
target_arch += {'lm32': lm32_ss}
target_softmmu_arch += {'lm32': lm32_softmmu_ss}

5
target/m68k/Makefile.objs
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@ -1,5 +0,0 @@
obj-y += m68k-semi.o
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += fpu_helper.o softfloat.o
obj-y += gdbstub.o
obj-$(CONFIG_SOFTMMU) += monitor.o

17
target/m68k/meson.build Normal file
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@ -0,0 +1,17 @@
m68k_ss = ss.source_set()
m68k_ss.add(files(
'cpu.c',
'fpu_helper.c',
'gdbstub.c',
'helper.c',
'm68k-semi.c',
'op_helper.c',
'softfloat.c',
'translate.c',
))
m68k_softmmu_ss = ss.source_set()
m68k_softmmu_ss.add(files('monitor.c'))
target_arch += {'m68k': m68k_ss}
target_softmmu_arch += {'m68k': m68k_softmmu_ss}

22
target/meson.build
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@ -1 +1,23 @@
subdir('alpha')
subdir('arm')
subdir('avr')
subdir('cris')
subdir('hppa')
subdir('i386')
subdir('lm32')
subdir('m68k')
subdir('microblaze')
subdir('mips')
subdir('moxie')
subdir('nios2')
subdir('openrisc')
subdir('ppc')
subdir('riscv')
subdir('rx')
subdir('s390x')
subdir('sh4')
subdir('sparc')
subdir('tilegx')
subdir('tricore')
subdir('unicore32')
subdir('xtensa')

3
target/microblaze/Makefile.objs
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@ -1,3 +0,0 @@
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += gdbstub.o
obj-$(CONFIG_SOFTMMU) += mmu.o

14
target/microblaze/meson.build Normal file
View File

@ -0,0 +1,14 @@
microblaze_ss = ss.source_set()
microblaze_ss.add(files(
'cpu.c',
'gdbstub.c',
'helper.c',
'op_helper.c',
'translate.c',
))
microblaze_softmmu_ss = ss.source_set()
microblaze_softmmu_ss.add(files('mmu.c'))
target_arch += {'microblaze': microblaze_ss}
target_softmmu_arch += {'microblaze': microblaze_softmmu_ss}

6
target/mips/Makefile.objs
View File

@ -1,6 +0,0 @@
obj-y += translate.o cpu.o gdbstub.o helper.o
obj-y += op_helper.o cp0_helper.o fpu_helper.o
obj-y += dsp_helper.o lmmi_helper.o msa_helper.o
obj-$(CONFIG_SOFTMMU) += mips-semi.o
obj-$(CONFIG_SOFTMMU) += machine.o cp0_timer.o
obj-$(CONFIG_KVM) += kvm.o

24
target/mips/meson.build Normal file
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@ -0,0 +1,24 @@
mips_ss = ss.source_set()
mips_ss.add(files(
'cp0_helper.c',
'cpu.c',
'dsp_helper.c',
'fpu_helper.c',
'gdbstub.c',
'helper.c',
'lmmi_helper.c',
'msa_helper.c',
'op_helper.c',
'translate.c',
))
mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
mips_softmmu_ss = ss.source_set()
mips_softmmu_ss.add(files(
'cp0_timer.c',
'machine.c',
'mips-semi.c',
))
target_arch += {'mips': mips_ss}
target_softmmu_arch += {'mips': mips_softmmu_ss}

2
target/moxie/Makefile.objs
View File

@ -1,2 +0,0 @@
obj-y += translate.o helper.o machine.o cpu.o machine.o
obj-$(CONFIG_SOFTMMU) += mmu.o

14
target/moxie/meson.build Normal file
View File

@ -0,0 +1,14 @@
moxie_ss = ss.source_set()
moxie_ss.add(files(
'cpu.c',
'helper.c',
'machine.c',
'machine.c',
'translate.c',
))
moxie_softmmu_ss = ss.source_set()
moxie_softmmu_ss.add(files('mmu.c'))
target_arch += {'moxie': moxie_ss}
target_softmmu_arch += {'moxie': moxie_softmmu_ss}

4
target/nios2/Makefile.objs
View File

@ -1,4 +0,0 @@
obj-y += translate.o op_helper.o helper.o cpu.o mmu.o nios2-semi.o
obj-$(CONFIG_SOFTMMU) += monitor.o
$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)

15
target/nios2/meson.build Normal file
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@ -0,0 +1,15 @@
nios2_ss = ss.source_set()
nios2_ss.add(files(
'cpu.c',
'helper.c',
'mmu.c',
'nios2-semi.c',
'op_helper.c',
'translate.c',
))
nios2_softmmu_ss = ss.source_set()
nios2_softmmu_ss.add(files('monitor.c'))
target_arch += {'nios2': nios2_ss}
target_softmmu_arch += {'nios2': nios2_softmmu_ss}

15
target/openrisc/Makefile.objs
View File

@ -1,15 +0,0 @@
obj-$(CONFIG_SOFTMMU) += machine.o
obj-y += cpu.o exception.o interrupt.o mmu.o translate.o disas.o
obj-y += exception_helper.o fpu_helper.o \
interrupt_helper.o sys_helper.o
obj-y += gdbstub.o
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
target/openrisc/decode.c.inc: \
$(SRC_PATH)/target/openrisc/insns.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) -o $@ $<, "GEN", $(TARGET_DIR)$@)
target/openrisc/translate.o: target/openrisc/decode.c.inc
target/openrisc/disas.o: target/openrisc/decode.c.inc

2
target/openrisc/disas.c
View File

@ -25,7 +25,7 @@
typedef disassemble_info DisasContext;
/* Include the auto-generated decoder. */
#include "decode.c.inc"
#include "decode-insns.c.inc"
#define output(mnemonic, format, ...) \
(info->fprintf_func(info->stream, "%-9s " format, \

23
target/openrisc/meson.build Normal file
View File

@ -0,0 +1,23 @@
gen = decodetree.process('insns.decode')
openrisc_ss = ss.source_set()
openrisc_ss.add(gen)
openrisc_ss.add(files(
'cpu.c',
'disas.c',
'exception.c',
'exception_helper.c',
'fpu_helper.c',
'gdbstub.c',
'interrupt.c',
'interrupt_helper.c',
'mmu.c',
'sys_helper.c',
'translate.c',
))
openrisc_softmmu_ss = ss.source_set()
openrisc_softmmu_ss.add(files('machine.c'))
target_arch += {'openrisc': openrisc_ss}
target_softmmu_arch += {'openrisc': openrisc_softmmu_ss}

2
target/openrisc/translate.c
View File

@ -65,7 +65,7 @@ static inline bool is_user(DisasContext *dc)
}
/* Include the auto-generated decoder. */
#include "decode.c.inc"
#include "decode-insns.c.inc"
static TCGv cpu_sr;
static TCGv cpu_regs[32];

20
target/ppc/Makefile.objs
View File

@ -1,20 +0,0 @@
obj-y += cpu-models.o
obj-y += cpu.o
obj-y += translate.o
ifeq ($(CONFIG_SOFTMMU),y)
obj-y += machine.o mmu_helper.o mmu-hash32.o monitor.o arch_dump.o
obj-$(TARGET_PPC64) += mmu-hash64.o mmu-book3s-v3.o compat.o
obj-$(TARGET_PPC64) += mmu-radix64.o
endif
obj-$(CONFIG_KVM) += kvm.o
obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
obj-y += dfp_helper.o
obj-y += excp_helper.o
obj-y += fpu_helper.o
obj-y += int_helper.o
obj-y += timebase_helper.o
obj-y += misc_helper.o
obj-y += mem_helper.o
obj-y += ../../libdecnumber/
obj-$(CONFIG_USER_ONLY) += user_only_helper.o
obj-y += gdbstub.o

37
target/ppc/meson.build Normal file
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@ -0,0 +1,37 @@
ppc_ss = ss.source_set()
ppc_ss.add(files(
'cpu-models.c',
'cpu.c',
'dfp_helper.c',
'excp_helper.c',
'fpu_helper.c',
'gdbstub.c',
'int_helper.c',
'mem_helper.c',
'misc_helper.c',
'timebase_helper.c',
'translate.c',
))
ppc_ss.add(libdecnumber)
ppc_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
ppc_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user_only_helper.c'))
ppc_softmmu_ss = ss.source_set()
ppc_softmmu_ss.add(files(
'arch_dump.c',
'machine.c',
'mmu-hash32.c',
'mmu_helper.c',
'monitor.c',
))
ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files(
'compat.c',
'mmu-book3s-v3.c',
'mmu-hash64.c',
'mmu-radix64.c',
))
target_arch += {'ppc': ppc_ss}
target_softmmu_arch += {'ppc': ppc_softmmu_ss}

28
target/riscv/Makefile.objs
View File

@ -1,28 +0,0 @@
obj-y += translate.o op_helper.o cpu_helper.o cpu.o csr.o fpu_helper.o vector_helper.o gdbstub.o
obj-$(CONFIG_SOFTMMU) += pmp.o
ifeq ($(CONFIG_SOFTMMU),y)
obj-y += monitor.o
endif
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
decode32-y = $(SRC_PATH)/target/riscv/insn32.decode
decode32-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn32-64.decode
decode16-y = $(SRC_PATH)/target/riscv/insn16.decode
decode16-$(TARGET_RISCV32) += $(SRC_PATH)/target/riscv/insn16-32.decode
decode16-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn16-64.decode
target/riscv/decode_insn32.c.inc: $(decode32-y) $(DECODETREE)
$(call quiet-command, \
$(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn32 \
$(decode32-y), "GEN", $(TARGET_DIR)$@)
target/riscv/decode_insn16.c.inc: $(decode16-y) $(DECODETREE)
$(call quiet-command, \
$(PYTHON) $(DECODETREE) -o $@ --static-decode decode_insn16 \
--insnwidth 16 $(decode16-y), "GEN", $(TARGET_DIR)$@)
target/riscv/translate.o: target/riscv/decode_insn32.c.inc \
target/riscv/decode_insn16.c.inc

34
target/riscv/meson.build Normal file
View File

@ -0,0 +1,34 @@
# FIXME extra_args should accept files()
dir = meson.current_source_dir()
gen32 = [
decodetree.process('insn16.decode', extra_args: [dir / 'insn16-32.decode', '--static-decode=decode_insn16', '--insnwidth=16']),
decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
]
gen64 = [
decodetree.process('insn16.decode', extra_args: [dir / 'insn16-64.decode', '--static-decode=decode_insn16', '--insnwidth=16']),
decodetree.process('insn32.decode', extra_args: [dir / 'insn32-64.decode', '--static-decode=decode_insn32']),
]
riscv_ss = ss.source_set()
riscv_ss.add(when: 'TARGET_RISCV32', if_true: gen32)
riscv_ss.add(when: 'TARGET_RISCV64', if_true: gen64)
riscv_ss.add(files(
'cpu.c',
'cpu_helper.c',
'csr.c',
'fpu_helper.c',
'gdbstub.c',
'op_helper.c',
'vector_helper.c',
'translate.c',
))
riscv_softmmu_ss = ss.source_set()
riscv_softmmu_ss.add(files(
'pmp.c',
'monitor.c'
))
target_arch += {'riscv': riscv_ss}
target_softmmu_arch += {'riscv': riscv_softmmu_ss}

4
target/riscv/translate.c
View File

@ -583,7 +583,7 @@ static int ex_rvc_shifti(DisasContext *ctx, int imm)
}
/* Include the auto-generated decoder for 32 bit insn */
#include "decode_insn32.c.inc"
#include "decode-insn32.c.inc"
static bool gen_arith_imm_fn(DisasContext *ctx, arg_i *a,
void (*func)(TCGv, TCGv, target_long))
@ -728,7 +728,7 @@ static bool gen_shift(DisasContext *ctx, arg_r *a,
#include "insn_trans/trans_privileged.c.inc"
/* Include the auto-generated decoder for 16 bit insn */
#include "decode_insn16.c.inc"
#include "decode-insn16.c.inc"
static void decode_opc(CPURISCVState *env, DisasContext *ctx, uint16_t opcode)
{

11
target/rx/Makefile.objs
View File

@ -1,11 +0,0 @@
obj-y += translate.o op_helper.o helper.o cpu.o gdbstub.o disas.o
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
target/rx/decode.c.inc: \
$(SRC_PATH)/target/rx/insns.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --varinsnwidth 32 -o $@ $<, "GEN", $(TARGET_DIR)$@)
target/rx/translate.o: target/rx/decode.c.inc
target/rx/disas.o: target/rx/decode.c.inc

2
target/rx/disas.c
View File

@ -100,7 +100,7 @@ static int bdsp_s(DisasContext *ctx, int d)
}
/* Include the auto-generated decoder. */
#include "decode.c.inc"
#include "decode-insns.c.inc"
static void dump_bytes(DisasContext *ctx)
{

16
target/rx/meson.build Normal file
View File

@ -0,0 +1,16 @@
gen = [
decodetree.process('insns.decode', extra_args: [ '--varinsnwidth', '32' ])
]
rx_ss = ss.source_set()
rx_ss.add(gen)
rx_ss.add(files(
'translate.c',
'op_helper.c',
'helper.c',
'cpu.c',
'gdbstub.c',
'disas.c'))
target_arch += {'rx': rx_ss}
target_softmmu_arch += {'rx': ss.source_set()}

2
target/rx/translate.c
View File

@ -124,7 +124,7 @@ static int bdsp_s(DisasContext *ctx, int d)
}
/* Include the auto-generated decoder. */
#include "decode.c.inc"
#include "decode-insns.c.inc"
void rx_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{

10
target/s390x/Makefile.objs
View File

@ -1,10 +0,0 @@
obj-y += cpu.o cpu_models.o cpu_features.o gdbstub.o interrupt.o helper.o
obj-$(CONFIG_TCG) += translate.o cc_helper.o excp_helper.o fpu_helper.o
obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o crypto_helper.o
obj-$(CONFIG_TCG) += vec_helper.o vec_int_helper.o vec_string_helper.o
obj-$(CONFIG_TCG) += vec_fpu_helper.o
obj-$(CONFIG_SOFTMMU) += machine.o ioinst.o arch_dump.o mmu_helper.o diag.o
obj-$(CONFIG_SOFTMMU) += sigp.o
obj-$(CONFIG_KVM) += kvm.o
obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
obj-$(call lnot,$(CONFIG_TCG)) += tcg-stub.o

42
target/s390x/meson.build
View File

@ -1,3 +1,30 @@
s390x_ss = ss.source_set()
s390x_ss.add(files(
'cpu.c',
'cpu_features.c',
'cpu_models.c',
'gdbstub.c',
'helper.c',
'interrupt.c',
))
s390x_ss.add(when: 'CONFIG_TCG', if_true: files(
'cc_helper.c',
'crypto_helper.c',
'excp_helper.c',
'fpu_helper.c',
'int_helper.c',
'mem_helper.c',
'misc_helper.c',
'translate.c',
'vec_fpu_helper.c',
'vec_helper.c',
'vec_int_helper.c',
'vec_string_helper.c',
), if_false: 'tcg-stub.c')
s390x_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
gen_features = executable('gen-features', 'gen-features.c', native: true,
build_by_default: false)
@ -6,4 +33,17 @@ gen_features_h = custom_target('gen-features.h',
capture: true,
command: gen_features)
specific_ss.add(gen_features_h)
s390x_ss.add(gen_features_h)
s390x_softmmu_ss = ss.source_set()
s390x_softmmu_ss.add(files(
'arch_dump.c',
'diag.c',
'ioinst.c',
'machine.c',
'mmu_helper.c',
'sigp.c',
))
target_arch += {'s390x': s390x_ss}
target_softmmu_arch += {'s390x': s390x_softmmu_ss}

3
target/sh4/Makefile.objs
View File

@ -1,3 +0,0 @@
obj-y += translate.o op_helper.o helper.o cpu.o
obj-$(CONFIG_SOFTMMU) += monitor.o
obj-y += gdbstub.o

14
target/sh4/meson.build Normal file
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@ -0,0 +1,14 @@
sh4_ss = ss.source_set()
sh4_ss.add(files(
'cpu.c',
'gdbstub.c',
'helper.c',
'op_helper.c',
'translate.c',
))
sh4_softmmu_ss = ss.source_set()
sh4_softmmu_ss.add(files('monitor.c'))
target_arch += {'sh4': sh4_ss}
target_softmmu_arch += {'sh4': sh4_softmmu_ss}

7
target/sparc/Makefile.objs
View File

@ -1,7 +0,0 @@
obj-$(CONFIG_SOFTMMU) += machine.o monitor.o
obj-y += translate.o helper.o cpu.o
obj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
obj-$(TARGET_SPARC) += int32_helper.o
obj-$(TARGET_SPARC64) += int64_helper.o
obj-$(TARGET_SPARC64) += vis_helper.o
obj-y += gdbstub.o

23
target/sparc/meson.build Normal file
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@ -0,0 +1,23 @@
sparc_ss = ss.source_set()
sparc_ss.add(files(
'cc_helper.c',
'cpu.c',
'fop_helper.c',
'gdbstub.c',
'helper.c',
'ldst_helper.c',
'mmu_helper.c',
'translate.c',
'win_helper.c',
))
sparc_ss.add(when: 'TARGET_SPARC', if_true: files('int32_helper.c'))
sparc_ss.add(when: 'TARGET_SPARC64', if_true: files('int64_helper.c', 'vis_helper.c'))
sparc_softmmu_ss = ss.source_set()
sparc_softmmu_ss.add(files(
'machine.c',
'monitor.c',
))
target_arch += {'sparc': sparc_ss}
target_softmmu_arch += {'sparc': sparc_softmmu_ss}

1
target/tilegx/Makefile.objs
View File

@ -1 +0,0 @@
obj-y += cpu.o translate.o helper.o simd_helper.o

13
target/tilegx/meson.build Normal file
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@ -0,0 +1,13 @@
tilegx_ss = ss.source_set()
tilegx_ss.add(files(
'cpu.c',
'helper.c',
'simd_helper.c',
'translate.c',
))
tilegx_ss.add(zlib)
tilegx_softmmu_ss = ss.source_set()
target_arch += {'tilegx': tilegx_ss}
target_softmmu_arch += {'tilegx': tilegx_softmmu_ss}

1
target/tricore/Makefile.objs
View File

@ -1 +0,0 @@
obj-y += translate.o helper.o cpu.o op_helper.o fpu_helper.o gdbstub.o

15
target/tricore/meson.build Normal file
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@ -0,0 +1,15 @@
tricore_ss = ss.source_set()
tricore_ss.add(files(
'cpu.c',
'fpu_helper.c',
'helper.c',
'op_helper.c',
'translate.c',
'gdbstub.c',
))
tricore_ss.add(zlib)
tricore_softmmu_ss = ss.source_set()
target_arch += {'tricore': tricore_ss}
target_softmmu_arch += {'tricore': tricore_softmmu_ss}

8
target/unicore32/Makefile.objs
View File

@ -1,8 +0,0 @@
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += ucf64_helper.o
obj-$(CONFIG_SOFTMMU) += softmmu.o
# Huh? Uses curses directly instead of using ui/console.h interfaces ...
helper.o-cflags := $(CURSES_CFLAGS)
helper.o-libs := $(CURSES_LIBS)

14
target/unicore32/meson.build Normal file
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@ -0,0 +1,14 @@
unicore32_ss = ss.source_set()
unicore32_ss.add(files(
'cpu.c',
'helper.c',
'op_helper.c',
'translate.c',
'ucf64_helper.c',
), curses)
unicore32_softmmu_ss = ss.source_set()
unicore32_softmmu_ss.add(files('softmmu.c'))
target_arch += {'unicore32': unicore32_ss}
target_softmmu_arch += {'unicore32': unicore32_softmmu_ss}

16
target/xtensa/Makefile.objs
View File

@ -1,16 +0,0 @@
obj-y += core-dc232b.o
obj-y += core-dc233c.o
obj-y += core-de212.o
obj-y += core-fsf.o
obj-y += core-sample_controller.o
obj-y += core-test_kc705_be.o
obj-y += core-test_mmuhifi_c3.o
obj-$(CONFIG_SOFTMMU) += monitor.o xtensa-semi.o
obj-y += xtensa-isa.o
obj-y += translate.o op_helper.o helper.o cpu.o
obj-$(CONFIG_SOFTMMU) += dbg_helper.o
obj-y += exc_helper.o
obj-y += fpu_helper.o
obj-y += gdbstub.o
obj-$(CONFIG_SOFTMMU) += mmu_helper.o
obj-y += win_helper.o

30
target/xtensa/meson.build Normal file
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@ -0,0 +1,30 @@
xtensa_ss = ss.source_set()
xtensa_ss.add(files(
'core-dc232b.c',
'core-dc233c.c',
'core-de212.c',
'core-fsf.c',
'core-sample_controller.c',
'core-test_kc705_be.c',
'core-test_mmuhifi_c3.c',
'cpu.c',
'exc_helper.c',
'fpu_helper.c',
'gdbstub.c',
'helper.c',
'op_helper.c',
'translate.c',
'win_helper.c',
'xtensa-isa.c',
))
xtensa_softmmu_ss = ss.source_set()
xtensa_softmmu_ss.add(files(
'dbg_helper.c',
'mmu_helper.c',
'monitor.c',
'xtensa-semi.c',
))
target_arch += {'xtensa': xtensa_ss}
target_softmmu_arch += {'xtensa': xtensa_softmmu_ss}