Fix broken TCX vram, restore Sun4u PROM_SIZE_MAX
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4263 c046a42c-6fe2-441c-8c8c-71466251a162
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parent
88fdf56f2a
commit
ac2e9d66b2
31
hw/sun4m.c
31
hw/sun4m.c
@ -76,6 +76,9 @@
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#define PROM_VADDR 0xffd00000
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#define PROM_VADDR 0xffd00000
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#define PROM_FILENAME "openbios-sparc32"
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#define PROM_FILENAME "openbios-sparc32"
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// Control plane, 8-bit and 24-bit planes
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#define TCX_SIZE (9 * 1024 * 1024)
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#define MAX_CPUS 16
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#define MAX_CPUS 16
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#define MAX_PILS 16
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#define MAX_PILS 16
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@ -1213,70 +1216,70 @@ QEMUMachine ss5_machine = {
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"SS-5",
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"SS-5",
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"Sun4m platform, SPARCstation 5",
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"Sun4m platform, SPARCstation 5",
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ss5_init,
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ss5_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine ss10_machine = {
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QEMUMachine ss10_machine = {
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"SS-10",
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"SS-10",
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"Sun4m platform, SPARCstation 10",
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"Sun4m platform, SPARCstation 10",
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ss10_init,
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ss10_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine ss600mp_machine = {
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QEMUMachine ss600mp_machine = {
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"SS-600MP",
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"SS-600MP",
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"Sun4m platform, SPARCserver 600MP",
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"Sun4m platform, SPARCserver 600MP",
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ss600mp_init,
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ss600mp_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine ss20_machine = {
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QEMUMachine ss20_machine = {
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"SS-20",
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"SS-20",
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"Sun4m platform, SPARCstation 20",
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"Sun4m platform, SPARCstation 20",
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ss20_init,
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ss20_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine ss2_machine = {
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QEMUMachine ss2_machine = {
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"SS-2",
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"SS-2",
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"Sun4c platform, SPARCstation 2",
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"Sun4c platform, SPARCstation 2",
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ss2_init,
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ss2_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine voyager_machine = {
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QEMUMachine voyager_machine = {
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"Voyager",
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"Voyager",
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"Sun4m platform, SPARCstation Voyager",
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"Sun4m platform, SPARCstation Voyager",
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vger_init,
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vger_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine ss_lx_machine = {
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QEMUMachine ss_lx_machine = {
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"LX",
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"LX",
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"Sun4m platform, SPARCstation LX",
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"Sun4m platform, SPARCstation LX",
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ss_lx_init,
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ss_lx_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine ss4_machine = {
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QEMUMachine ss4_machine = {
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"SS-4",
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"SS-4",
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"Sun4m platform, SPARCstation 4",
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"Sun4m platform, SPARCstation 4",
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ss4_init,
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ss4_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine scls_machine = {
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QEMUMachine scls_machine = {
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"SPARCClassic",
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"SPARCClassic",
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"Sun4m platform, SPARCClassic",
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"Sun4m platform, SPARCClassic",
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scls_init,
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scls_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine sbook_machine = {
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QEMUMachine sbook_machine = {
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"SPARCbook",
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"SPARCbook",
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"Sun4m platform, SPARCbook",
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"Sun4m platform, SPARCbook",
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sbook_init,
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sbook_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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static const struct sun4d_hwdef sun4d_hwdefs[] = {
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static const struct sun4d_hwdef sun4d_hwdefs[] = {
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@ -1300,7 +1303,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
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.ledma_base = 0x800040000ULL,
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.ledma_base = 0x800040000ULL,
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.le_base = 0x800060000ULL,
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.le_base = 0x800060000ULL,
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.sbi_base = 0xf02800000ULL,
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.sbi_base = 0xf02800000ULL,
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.vram_size = 0x00100000,
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.vram_size = TCX_SIZE,
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.nvram_size = 0x2000,
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.nvram_size = 0x2000,
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.esp_irq = 3,
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.esp_irq = 3,
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.le_irq = 4,
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.le_irq = 4,
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@ -1333,7 +1336,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
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.ledma_base = 0x800040000ULL,
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.ledma_base = 0x800040000ULL,
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.le_base = 0x800060000ULL,
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.le_base = 0x800060000ULL,
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.sbi_base = 0xf02800000ULL,
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.sbi_base = 0xf02800000ULL,
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.vram_size = 0x00100000,
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.vram_size = TCX_SIZE,
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.nvram_size = 0x2000,
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.nvram_size = 0x2000,
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.esp_irq = 3,
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.esp_irq = 3,
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.le_irq = 4,
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.le_irq = 4,
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@ -1513,12 +1516,12 @@ QEMUMachine ss1000_machine = {
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"SS-1000",
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"SS-1000",
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"Sun4d platform, SPARCserver 1000",
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"Sun4d platform, SPARCserver 1000",
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ss1000_init,
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ss1000_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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QEMUMachine ss2000_machine = {
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QEMUMachine ss2000_machine = {
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"SS-2000",
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"SS-2000",
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"Sun4d platform, SPARCcenter 2000",
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"Sun4d platform, SPARCcenter 2000",
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ss2000_init,
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ss2000_init,
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PROM_SIZE_MAX + 0x00100000,
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PROM_SIZE_MAX + TCX_SIZE,
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};
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};
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@ -35,7 +35,7 @@
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#define KERNEL_LOAD_ADDR 0x00404000
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#define KERNEL_LOAD_ADDR 0x00404000
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#define CMDLINE_ADDR 0x003ff000
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#define CMDLINE_ADDR 0x003ff000
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#define INITRD_LOAD_ADDR 0x00300000
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#define INITRD_LOAD_ADDR 0x00300000
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#define PROM_SIZE_MAX (512 * 1024)
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#define PROM_SIZE_MAX (4 * 1024 * 1024)
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#define PROM_ADDR 0x1fff0000000ULL
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#define PROM_ADDR 0x1fff0000000ULL
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#define PROM_VADDR 0x000ffd00000ULL
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#define PROM_VADDR 0x000ffd00000ULL
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#define APB_SPECIAL_BASE 0x1fe00000000ULL
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#define APB_SPECIAL_BASE 0x1fe00000000ULL
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