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sdhci: add a 'spec_version property' (default to v2)

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Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-Id: <20180208164818.7961-8-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2018-02-08 13:47:55 -03:00 committed by Paolo Bonzini
parent efe9d52405
commit aceb5b064c
3 changed files with 27 additions and 6 deletions
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4
hw/sd/sdhci-internal.h
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@ -216,9 +216,9 @@
/* Slot interrupt status */
#define SDHC_SLOT_INT_STATUS 0xFC
/* HWInit Host Controller Version Register 0x0401 */
/* HWInit Host Controller Version Register */
#define SDHC_HCVER 0xFE
#define SD_HOST_SPECv2_VERS 0x2401
#define SDHC_HCVER_VENDOR 0x24
#define SDHC_REGISTERS_MAP_SIZE 0x100
#define SDHC_INSERTION_DELAY (NANOSECONDS_PER_SECOND)

27
hw/sd/sdhci.c
View File

@ -173,7 +173,8 @@ static void sdhci_reset(SDHCIState *s)
timer_del(s->insert_timer);
timer_del(s->transfer_timer);
/* Set all registers to 0. Capabilities registers are not cleared
/* Set all registers to 0. Capabilities/Version registers are not cleared
* and assumed to always preserve their value, given to them during
* initialization */
memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmasysad);
@ -918,7 +919,7 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset, unsigned size)
ret = (uint32_t)(s->admasysaddr >> 32);
break;
case SDHC_SLOT_INT_STATUS:
ret = (SD_HOST_SPECv2_VERS << 16) | sdhci_slotint(s);
ret = (s->version << 16) | sdhci_slotint(s);
break;
default:
qemu_log_mask(LOG_UNIMP, "SDHC rd_%ub @0x%02" HWADDR_PRIx " "
@ -1174,11 +1175,22 @@ static inline unsigned int sdhci_get_fifolen(SDHCIState *s)
}
}
static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)
{
if (s->sd_spec_version != 2) {
error_setg(errp, "Only Spec v2 is supported");
return;
}
s->version = (SDHC_HCVER_VENDOR << 8) | (s->sd_spec_version - 1);
}
/* --- qdev common --- */
#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
/* Capabilities registers provide information on supported features
* of this specific host controller implementation */ \
DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
\
/* Capabilities registers provide information on supported
* features of this specific host controller implementation */ \
DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \
DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0)
@ -1206,6 +1218,13 @@ static void sdhci_uninitfn(SDHCIState *s)
static void sdhci_common_realize(SDHCIState *s, Error **errp)
{
Error *local_err = NULL;
sdhci_init_readonly_registers(s, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
s->buf_maxsz = sdhci_get_fifolen(s);
s->fifo_buffer = g_malloc0(s->buf_maxsz);

2
include/hw/sd/sdhci.h
View File

@ -78,6 +78,7 @@ typedef struct SDHCIState {
/* Read-only registers */
uint64_t capareg; /* Capabilities Register */
uint64_t maxcurr; /* Maximum Current Capabilities Register */
uint16_t version; /* Host Controller Version Register */
uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
uint32_t buf_maxsz;
@ -93,6 +94,7 @@ typedef struct SDHCIState {
/* Configurable properties */
bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
uint32_t quirks;
uint8_t sd_spec_version;
} SDHCIState;
/*