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msix: avoid mask updates if mask is unchanged

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Check pending bit only if vector mask status changed.
This is not really important for qemu.git but helps
fix a bug in qemu-kvm.git.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Michael S. Tsirkin 2011-11-21 18:57:50 +02:00 committed by Anthony Liguori
parent 9a93b61730
commit ae392c416c
1 changed files with 20 additions and 9 deletions
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29
hw/msix.c
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@ -118,17 +118,25 @@ static void msix_clr_pending(PCIDevice *dev, int vector)
*msix_pending_byte(dev, vector) &= ~msix_pending_mask(vector); *msix_pending_byte(dev, vector) &= ~msix_pending_mask(vector);
} }
static int msix_is_masked(PCIDevice *dev, int vector) static bool msix_vector_masked(PCIDevice *dev, int vector, bool fmask)
{ {
unsigned offset = unsigned offset = vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL;
vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; return fmask || dev->msix_table_page[offset] & PCI_MSIX_ENTRY_CTRL_MASKBIT;
return dev->msix_function_masked ||
dev->msix_table_page[offset] & PCI_MSIX_ENTRY_CTRL_MASKBIT;
} }
static void msix_handle_mask_update(PCIDevice *dev, int vector) static bool msix_is_masked(PCIDevice *dev, int vector)
{ {
if (!msix_is_masked(dev, vector) && msix_is_pending(dev, vector)) { return msix_vector_masked(dev, vector, dev->msix_function_masked);
}
static void msix_handle_mask_update(PCIDevice *dev, int vector, bool was_masked)
{
bool is_masked = msix_is_masked(dev, vector);
if (is_masked == was_masked) {
return;
}
if (!is_masked && msix_is_pending(dev, vector)) {
msix_clr_pending(dev, vector); msix_clr_pending(dev, vector);
msix_notify(dev, vector); msix_notify(dev, vector);
} }
@ -166,7 +174,8 @@ void msix_write_config(PCIDevice *dev, uint32_t addr,
} }
for (vector = 0; vector < dev->msix_entries_nr; ++vector) { for (vector = 0; vector < dev->msix_entries_nr; ++vector) {
msix_handle_mask_update(dev, vector); msix_handle_mask_update(dev, vector,
msix_vector_masked(dev, vector, was_masked));
} }
} }
@ -176,14 +185,16 @@ static void msix_mmio_write(void *opaque, target_phys_addr_t addr,
PCIDevice *dev = opaque; PCIDevice *dev = opaque;
unsigned int offset = addr & (MSIX_PAGE_SIZE - 1) & ~0x3; unsigned int offset = addr & (MSIX_PAGE_SIZE - 1) & ~0x3;
int vector = offset / PCI_MSIX_ENTRY_SIZE; int vector = offset / PCI_MSIX_ENTRY_SIZE;
bool was_masked;
/* MSI-X page includes a read-only PBA and a writeable Vector Control. */ /* MSI-X page includes a read-only PBA and a writeable Vector Control. */
if (vector >= dev->msix_entries_nr) { if (vector >= dev->msix_entries_nr) {
return; return;
} }
was_masked = msix_is_masked(dev, vector);
pci_set_long(dev->msix_table_page + offset, val); pci_set_long(dev->msix_table_page + offset, val);
msix_handle_mask_update(dev, vector); msix_handle_mask_update(dev, vector, was_masked);
} }
static const MemoryRegionOps msix_mmio_ops = { static const MemoryRegionOps msix_mmio_ops = {