target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages
This bug has a noticeable behavior of falling back to the main loop and respawning a redundant translation block including a single instruction when the end address of the compressive instruction is exactly on a page boundary, and slows down running system performance. Signed-off-by: Shaobo Song <songshaobo@eswincomputing.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230220072732.568-1-songshaobo@eswincomputing.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -1261,7 +1261,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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uint16_t next_insn = cpu_lduw_code(env, ctx->base.pc_next);
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int len = insn_len(next_insn);
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if (!is_same_page(&ctx->base, ctx->base.pc_next + len)) {
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if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
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ctx->base.is_jmp = DISAS_TOO_MANY;
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}
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}
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