tcg: Allocate TCGTemp pairs in host memory order
Allocate the first of a pair at the lower address, and the second of a pair at the higher address. This will make it easier to find the beginning of the larger memory block. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -62,11 +62,11 @@ static inline unsigned tcg_call_flags(TCGOp *op)
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#if TCG_TARGET_REG_BITS == 32
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#if TCG_TARGET_REG_BITS == 32
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static inline TCGv_i32 TCGV_LOW(TCGv_i64 t)
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static inline TCGv_i32 TCGV_LOW(TCGv_i64 t)
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{
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{
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return temp_tcgv_i32(tcgv_i64_temp(t));
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return temp_tcgv_i32(tcgv_i64_temp(t) + HOST_BIG_ENDIAN);
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}
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}
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static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
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static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
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{
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{
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return temp_tcgv_i32(tcgv_i64_temp(t) + 1);
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return temp_tcgv_i32(tcgv_i64_temp(t) + !HOST_BIG_ENDIAN);
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}
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}
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#else
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#else
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extern TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit code path is reachable");
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extern TCGv_i32 TCGV_LOW(TCGv_i64) QEMU_ERROR("32-bit code path is reachable");
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58
tcg/tcg.c
58
tcg/tcg.c
@ -887,10 +887,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
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TCGContext *s = tcg_ctx;
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TCGContext *s = tcg_ctx;
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TCGTemp *base_ts = tcgv_ptr_temp(base);
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TCGTemp *base_ts = tcgv_ptr_temp(base);
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TCGTemp *ts = tcg_global_alloc(s);
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TCGTemp *ts = tcg_global_alloc(s);
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int indirect_reg = 0, bigendian = 0;
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int indirect_reg = 0;
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#if HOST_BIG_ENDIAN
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bigendian = 1;
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#endif
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switch (base_ts->kind) {
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switch (base_ts->kind) {
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case TEMP_FIXED:
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case TEMP_FIXED:
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@ -916,7 +913,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
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ts->indirect_reg = indirect_reg;
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ts->indirect_reg = indirect_reg;
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ts->mem_allocated = 1;
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ts->mem_allocated = 1;
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ts->mem_base = base_ts;
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ts->mem_base = base_ts;
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ts->mem_offset = offset + bigendian * 4;
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ts->mem_offset = offset;
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pstrcpy(buf, sizeof(buf), name);
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pstrcpy(buf, sizeof(buf), name);
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pstrcat(buf, sizeof(buf), "_0");
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pstrcat(buf, sizeof(buf), "_0");
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ts->name = strdup(buf);
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ts->name = strdup(buf);
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@ -927,7 +924,7 @@ TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
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ts2->indirect_reg = indirect_reg;
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ts2->indirect_reg = indirect_reg;
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ts2->mem_allocated = 1;
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ts2->mem_allocated = 1;
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ts2->mem_base = base_ts;
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ts2->mem_base = base_ts;
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ts2->mem_offset = offset + (1 - bigendian) * 4;
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ts2->mem_offset = offset + 4;
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ts2->temp_subindex = 1;
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ts2->temp_subindex = 1;
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pstrcpy(buf, sizeof(buf), name);
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pstrcpy(buf, sizeof(buf), name);
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pstrcat(buf, sizeof(buf), "_1");
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pstrcat(buf, sizeof(buf), "_1");
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@ -1073,37 +1070,43 @@ TCGTemp *tcg_constant_internal(TCGType type, int64_t val)
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ts = g_hash_table_lookup(h, &val);
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ts = g_hash_table_lookup(h, &val);
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if (ts == NULL) {
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if (ts == NULL) {
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int64_t *val_ptr;
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ts = tcg_temp_alloc(s);
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ts = tcg_temp_alloc(s);
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if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
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if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
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TCGTemp *ts2 = tcg_temp_alloc(s);
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TCGTemp *ts2 = tcg_temp_alloc(s);
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tcg_debug_assert(ts2 == ts + 1);
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ts->base_type = TCG_TYPE_I64;
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ts->base_type = TCG_TYPE_I64;
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ts->type = TCG_TYPE_I32;
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ts->type = TCG_TYPE_I32;
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ts->kind = TEMP_CONST;
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ts->kind = TEMP_CONST;
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ts->temp_allocated = 1;
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ts->temp_allocated = 1;
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/*
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* Retain the full value of the 64-bit constant in the low
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* part, so that the hash table works. Actual uses will
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* truncate the value to the low part.
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*/
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ts->val = val;
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tcg_debug_assert(ts2 == ts + 1);
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ts2->base_type = TCG_TYPE_I64;
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ts2->base_type = TCG_TYPE_I64;
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ts2->type = TCG_TYPE_I32;
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ts2->type = TCG_TYPE_I32;
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ts2->kind = TEMP_CONST;
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ts2->kind = TEMP_CONST;
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ts2->temp_allocated = 1;
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ts2->temp_allocated = 1;
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ts2->temp_subindex = 1;
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ts2->temp_subindex = 1;
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ts2->val = val >> 32;
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/*
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* Retain the full value of the 64-bit constant in the low
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* part, so that the hash table works. Actual uses will
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* truncate the value to the low part.
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*/
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ts[HOST_BIG_ENDIAN].val = val;
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ts[!HOST_BIG_ENDIAN].val = val >> 32;
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val_ptr = &ts[HOST_BIG_ENDIAN].val;
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} else {
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} else {
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ts->base_type = type;
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ts->base_type = type;
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ts->type = type;
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ts->type = type;
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ts->kind = TEMP_CONST;
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ts->kind = TEMP_CONST;
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ts->temp_allocated = 1;
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ts->temp_allocated = 1;
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ts->val = val;
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ts->val = val;
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val_ptr = &ts->val;
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}
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}
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g_hash_table_insert(h, &ts->val, ts);
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g_hash_table_insert(h, val_ptr, ts);
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}
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}
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return ts;
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return ts;
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@ -1515,13 +1518,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
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pi = 0;
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pi = 0;
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if (ret != NULL) {
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if (ret != NULL) {
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if (TCG_TARGET_REG_BITS < 64 && (typemask & 6) == dh_typecode_i64) {
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if (TCG_TARGET_REG_BITS < 64 && (typemask & 6) == dh_typecode_i64) {
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#if HOST_BIG_ENDIAN
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op->args[pi++] = temp_arg(ret + 1);
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op->args[pi++] = temp_arg(ret);
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#else
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op->args[pi++] = temp_arg(ret);
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op->args[pi++] = temp_arg(ret);
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op->args[pi++] = temp_arg(ret + 1);
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op->args[pi++] = temp_arg(ret + 1);
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#endif
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nb_rets = 2;
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nb_rets = 2;
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} else {
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} else {
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op->args[pi++] = temp_arg(ret);
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op->args[pi++] = temp_arg(ret);
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@ -1555,8 +1553,8 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
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}
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}
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if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
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if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
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op->args[pi++] = temp_arg(args[i] + HOST_BIG_ENDIAN);
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op->args[pi++] = temp_arg(args[i]);
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op->args[pi++] = temp_arg(args[i] + !HOST_BIG_ENDIAN);
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op->args[pi++] = temp_arg(args[i] + 1);
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real_args += 2;
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real_args += 2;
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continue;
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continue;
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}
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}
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@ -4082,14 +4080,14 @@ static bool tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op)
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}
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}
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/* If the two inputs form one 64-bit value, try dupm_vec. */
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/* If the two inputs form one 64-bit value, try dupm_vec. */
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if (itsl + 1 == itsh && itsl->base_type == TCG_TYPE_I64) {
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if (itsl->temp_subindex == HOST_BIG_ENDIAN &&
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temp_sync(s, itsl, s->reserved_regs, 0, 0);
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itsh->temp_subindex == !HOST_BIG_ENDIAN &&
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temp_sync(s, itsh, s->reserved_regs, 0, 0);
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itsl == itsh + (HOST_BIG_ENDIAN ? 1 : -1)) {
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#if HOST_BIG_ENDIAN
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TCGTemp *its = itsl - HOST_BIG_ENDIAN;
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TCGTemp *its = itsh;
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#else
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temp_sync(s, its + 0, s->reserved_regs, 0, 0);
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TCGTemp *its = itsl;
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temp_sync(s, its + 1, s->reserved_regs, 0, 0);
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#endif
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if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg,
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if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg,
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its->mem_base->reg, its->mem_offset)) {
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its->mem_base->reg, its->mem_offset)) {
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goto done;
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goto done;
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