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cadence_uart: check for serial backend before using it.

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This checks that s->chr is not NULL before using it.

Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
KONRAD Frederic 2014-07-15 17:18:44 +02:00 committed by Peter Maydell
parent 231f6927c8
commit af52fe862f
1 changed files with 11 additions and 4 deletions
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15
hw/char/cadence_uart.c
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@ -175,8 +175,10 @@ static void uart_send_breaks(UartState *s)
{ {
int break_enabled = 1; int break_enabled = 1;
qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_BREAK, if (s->chr) {
&break_enabled); qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_BREAK,
&break_enabled);
}
} }
static void uart_parameters_setup(UartState *s) static void uart_parameters_setup(UartState *s)
@ -227,7 +229,9 @@ static void uart_parameters_setup(UartState *s)
packet_size += ssp.data_bits + ssp.stop_bits; packet_size += ssp.data_bits + ssp.stop_bits;
s->char_tx_time = (get_ticks_per_sec() / ssp.speed) * packet_size; s->char_tx_time = (get_ticks_per_sec() / ssp.speed) * packet_size;
qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp); if (s->chr) {
qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
}
} }
static int uart_can_receive(void *opaque) static int uart_can_receive(void *opaque)
@ -295,6 +299,7 @@ static gboolean cadence_uart_xmit(GIOChannel *chan, GIOCondition cond,
/* instant drain the fifo when there's no back-end */ /* instant drain the fifo when there's no back-end */
if (!s->chr) { if (!s->chr) {
s->tx_count = 0; s->tx_count = 0;
return FALSE;
} }
if (!s->tx_count) { if (!s->tx_count) {
@ -375,7 +380,9 @@ static void uart_read_rx_fifo(UartState *s, uint32_t *c)
*c = s->rx_fifo[rx_rpos]; *c = s->rx_fifo[rx_rpos];
s->rx_count--; s->rx_count--;
qemu_chr_accept_input(s->chr); if (s->chr) {
qemu_chr_accept_input(s->chr);
}
} else { } else {
*c = 0; *c = 0;
} }