apci: switch cnt to memory api
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
parent
77d58b1e47
commit
afafe4bbe0
38
hw/acpi.c
38
hw/acpi.c
@ -372,13 +372,7 @@ void acpi_pm_tmr_reset(ACPIREGS *ar)
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}
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/* ACPI PM1aCNT */
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void acpi_pm1_cnt_init(ACPIREGS *ar)
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{
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ar->wakeup.notify = acpi_notify_wakeup;
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qemu_register_wakeup_notifier(&ar->wakeup);
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}
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void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val, char s4)
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static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val)
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{
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ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE);
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@ -393,7 +387,7 @@ void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val, char s4)
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qemu_system_suspend_request();
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break;
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default:
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if (sus_typ == s4) { /* S4 request */
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if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */
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monitor_protocol_event(QEVENT_SUSPEND_DISK, NULL);
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qemu_system_shutdown_request();
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}
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@ -413,6 +407,34 @@ void acpi_pm1_cnt_update(ACPIREGS *ar,
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}
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}
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static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width)
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{
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ACPIREGS *ar = opaque;
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return ar->pm1.cnt.cnt;
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}
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static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned width)
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{
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acpi_pm1_cnt_write(opaque, val);
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}
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static const MemoryRegionOps acpi_pm_cnt_ops = {
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.read = acpi_pm_cnt_read,
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.write = acpi_pm_cnt_write,
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.valid.min_access_size = 2,
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.valid.max_access_size = 2,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent)
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{
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ar->wakeup.notify = acpi_notify_wakeup;
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qemu_register_wakeup_notifier(&ar->wakeup);
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memory_region_init_io(&ar->pm1.cnt.io, &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
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memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
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}
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void acpi_pm1_cnt_reset(ACPIREGS *ar)
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{
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ar->pm1.cnt.cnt = 0;
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@ -96,7 +96,9 @@ struct ACPIPM1EVT {
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};
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struct ACPIPM1CNT {
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MemoryRegion io;
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uint16_t cnt;
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uint8_t s4_val;
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};
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struct ACPIGPE {
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@ -139,8 +141,7 @@ void acpi_pm1_evt_power_down(ACPIREGS *ar);
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void acpi_pm1_evt_reset(ACPIREGS *ar);
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/* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
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void acpi_pm1_cnt_init(ACPIREGS *ar);
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void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val, char s4);
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void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent);
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void acpi_pm1_cnt_update(ACPIREGS *ar,
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bool sci_enable, bool sci_disable);
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void acpi_pm1_cnt_reset(ACPIREGS *ar);
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@ -116,9 +116,6 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
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pm->acpi_regs.pm1.evt.en = val;
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pm_update_sci(pm);
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break;
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case ICH9_PMIO_PM1_CNT:
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acpi_pm1_cnt_write(&pm->acpi_regs, val, 0);
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break;
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default:
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pm_ioport_write_fallback(opaque, addr, 2, val);
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break;
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@ -138,9 +135,6 @@ static uint32_t pm_ioport_readw(void *opaque, uint32_t addr)
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case ICH9_PMIO_PM1_EN:
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val = pm->acpi_regs.pm1.evt.en;
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break;
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case ICH9_PMIO_PM1_CNT:
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val = pm->acpi_regs.pm1.cnt.cnt;
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break;
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default:
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val = pm_ioport_read_fallback(opaque, addr, 2);
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break;
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@ -318,7 +312,7 @@ void ich9_pm_init(ICH9LPCPMRegs *pm, qemu_irq sci_irq, qemu_irq cmos_s3)
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memory_region_add_subregion(get_system_io(), 0, &pm->io);
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acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
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acpi_pm1_cnt_init(&pm->acpi_regs);
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acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io);
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acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
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acpi_gpe_blk(&pm->acpi_regs, ICH9_PMIO_GPE0_STS);
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@ -129,9 +129,6 @@ static void pm_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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acpi_pm1_evt_write_en(&s->ar, val);
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pm_update_sci(s);
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break;
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case 0x04:
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acpi_pm1_cnt_write(&s->ar, val, s->s4_val);
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break;
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default:
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break;
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}
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@ -151,9 +148,6 @@ static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width)
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case 0x02:
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val = s->ar.pm1.evt.en;
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break;
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case 0x04:
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val = s->ar.pm1.cnt.cnt;
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break;
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default:
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val = 0;
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break;
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@ -461,6 +455,7 @@ static int piix4_pm_initfn(PCIDevice *dev)
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memory_region_add_subregion(get_system_io(), 0, &s->io);
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acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io);
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acpi_pm1_cnt_init(&s->ar, &s->io);
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acpi_gpe_init(&s->ar, GPE_LEN);
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s->powerdown_notifier.notify = piix4_pm_powerdown_req;
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@ -487,7 +482,6 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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s = DO_UPCAST(PIIX4PMState, dev, dev);
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s->irq = sci_irq;
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acpi_pm1_cnt_init(&s->ar);
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s->smi_irq = smi_irq;
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s->kvm_enabled = kvm_enabled;
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@ -211,9 +211,6 @@ static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
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acpi_pm1_evt_write_en(&s->ar, val);
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pm_update_sci(s);
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break;
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case 0x04:
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acpi_pm1_cnt_write(&s->ar, val, 0);
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break;
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default:
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break;
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}
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@ -233,9 +230,6 @@ static uint32_t pm_ioport_readw(void *opaque, uint32_t addr)
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case 0x02:
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val = s->ar.pm1.evt.en;
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break;
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case 0x04:
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val = s->ar.pm1.cnt.cnt;
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break;
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default:
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val = 0;
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break;
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@ -443,7 +437,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev)
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memory_region_add_subregion(get_system_io(), 0, &s->io);
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acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io);
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acpi_pm1_cnt_init(&s->ar);
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acpi_pm1_cnt_init(&s->ar, &s->io);
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pm_smbus_init(&s->dev.qdev, &s->smb);
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