hw/mips: malta: Add KVM support
In KVM mode the bootrom is loaded and executed from the last 1MB of DRAM. Based on "[PATCH 12/12] KVM/MIPS: General KVM support and support for SMP Guests" by Sanjay Lal <sanjayl@kymasys.com>. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -51,6 +51,7 @@
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#include "sysemu/qtest.h"
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#include "qemu/error-report.h"
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#include "hw/empty_slot.h"
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#include "sysemu/kvm.h"
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//#define DEBUG_BOARD_INIT
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@ -603,29 +604,31 @@ static void network_init(PCIBus *pci_bus)
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*/
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static void write_bootloader (CPUMIPSState *env, uint8_t *base,
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int64_t kernel_entry)
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int64_t run_addr, int64_t kernel_entry)
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{
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uint32_t *p;
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/* Small bootloader */
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p = (uint32_t *)base;
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stl_p(p++, 0x0bf00160); /* j 0x1fc00580 */
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stl_p(p++, 0x08000000 | /* j 0x1fc00580 */
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((run_addr + 0x580) & 0x0fffffff) >> 2);
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stl_p(p++, 0x00000000); /* nop */
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/* YAMON service vector */
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stl_p(base + 0x500, 0xbfc00580); /* start: */
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stl_p(base + 0x504, 0xbfc0083c); /* print_count: */
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stl_p(base + 0x520, 0xbfc00580); /* start: */
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stl_p(base + 0x52c, 0xbfc00800); /* flush_cache: */
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stl_p(base + 0x534, 0xbfc00808); /* print: */
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stl_p(base + 0x538, 0xbfc00800); /* reg_cpu_isr: */
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stl_p(base + 0x53c, 0xbfc00800); /* unred_cpu_isr: */
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stl_p(base + 0x540, 0xbfc00800); /* reg_ic_isr: */
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stl_p(base + 0x544, 0xbfc00800); /* unred_ic_isr: */
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stl_p(base + 0x548, 0xbfc00800); /* reg_esr: */
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stl_p(base + 0x54c, 0xbfc00800); /* unreg_esr: */
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stl_p(base + 0x550, 0xbfc00800); /* getchar: */
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stl_p(base + 0x554, 0xbfc00800); /* syscon_read: */
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stl_p(base + 0x500, run_addr + 0x0580); /* start: */
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stl_p(base + 0x504, run_addr + 0x083c); /* print_count: */
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stl_p(base + 0x520, run_addr + 0x0580); /* start: */
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stl_p(base + 0x52c, run_addr + 0x0800); /* flush_cache: */
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stl_p(base + 0x534, run_addr + 0x0808); /* print: */
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stl_p(base + 0x538, run_addr + 0x0800); /* reg_cpu_isr: */
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stl_p(base + 0x53c, run_addr + 0x0800); /* unred_cpu_isr: */
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stl_p(base + 0x540, run_addr + 0x0800); /* reg_ic_isr: */
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stl_p(base + 0x544, run_addr + 0x0800); /* unred_ic_isr: */
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stl_p(base + 0x548, run_addr + 0x0800); /* reg_esr: */
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stl_p(base + 0x54c, run_addr + 0x0800); /* unreg_esr: */
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stl_p(base + 0x550, run_addr + 0x0800); /* getchar: */
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stl_p(base + 0x554, run_addr + 0x0800); /* syscon_read: */
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/* Second part of the bootloader */
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@ -774,6 +777,7 @@ static int64_t load_kernel (void)
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uint32_t *prom_buf;
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long prom_size;
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int prom_index = 0;
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uint64_t (*xlate_to_kseg0) (void *opaque, uint64_t addr);
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#ifdef TARGET_WORDS_BIGENDIAN
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big_endian = 1;
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@ -788,6 +792,11 @@ static int64_t load_kernel (void)
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loaderparams.kernel_filename);
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exit(1);
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}
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if (kvm_enabled()) {
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xlate_to_kseg0 = cpu_mips_kvm_um_phys_to_kseg0;
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} else {
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xlate_to_kseg0 = cpu_mips_phys_to_kseg0;
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}
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/* load initrd */
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initrd_size = 0;
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@ -820,7 +829,7 @@ static int64_t load_kernel (void)
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prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_filename);
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if (initrd_size > 0) {
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prom_set(prom_buf, prom_index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
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cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
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xlate_to_kseg0(NULL, initrd_offset), initrd_size,
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loaderparams.kernel_cmdline);
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} else {
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prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline);
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@ -829,6 +838,7 @@ static int64_t load_kernel (void)
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prom_set(prom_buf, prom_index++, "memsize");
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prom_set(prom_buf, prom_index++, "%i",
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MIN(loaderparams.ram_size, 256 << 20));
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prom_set(prom_buf, prom_index++, "modetty0");
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prom_set(prom_buf, prom_index++, "38400n8r");
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prom_set(prom_buf, prom_index++, NULL);
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@ -863,6 +873,11 @@ static void main_cpu_reset(void *opaque)
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}
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malta_mips_config(cpu);
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if (kvm_enabled()) {
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/* Start running from the bootloader we wrote to end of RAM */
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env->active_tc.PC = 0x40000000 + loaderparams.ram_size;
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}
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}
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static void cpu_request_exit(void *opaque, int irq, int level)
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@ -878,6 +893,7 @@ static
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void mips_malta_init(MachineState *machine)
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{
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ram_addr_t ram_size = machine->ram_size;
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ram_addr_t ram_low_size;
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const char *cpu_model = machine->cpu_model;
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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@ -892,7 +908,7 @@ void mips_malta_init(MachineState *machine)
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target_long bios_size = FLASH_SIZE;
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const size_t smbus_eeprom_size = 8 * 256;
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uint8_t *smbus_eeprom_buf = g_malloc0(smbus_eeprom_size);
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int64_t kernel_entry;
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int64_t kernel_entry, bootloader_run_addr;
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PCIBus *pci_bus;
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ISABus *isa_bus;
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MIPSCPU *cpu;
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@ -1011,13 +1027,30 @@ void mips_malta_init(MachineState *machine)
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bios = pflash_cfi01_get_memory(fl);
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fl_idx++;
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if (kernel_filename) {
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ram_low_size = MIN(ram_size, 256 << 20);
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/* For KVM T&E we reserve 1MB of RAM for running bootloader */
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if (kvm_enabled()) {
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ram_low_size -= 0x100000;
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bootloader_run_addr = 0x40000000 + ram_low_size;
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} else {
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bootloader_run_addr = 0xbfc00000;
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}
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/* Write a small bootloader to the flash location. */
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loaderparams.ram_size = MIN(ram_size, 256 << 20);
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loaderparams.ram_size = ram_low_size;
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loaderparams.kernel_filename = kernel_filename;
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loaderparams.kernel_cmdline = kernel_cmdline;
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loaderparams.initrd_filename = initrd_filename;
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kernel_entry = load_kernel();
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write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
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write_bootloader(env, memory_region_get_ram_ptr(bios),
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bootloader_run_addr, kernel_entry);
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if (kvm_enabled()) {
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/* Write the bootloader code @ the end of RAM, 1MB reserved */
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write_bootloader(env, memory_region_get_ram_ptr(ram_low_preio) +
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ram_low_size,
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bootloader_run_addr, kernel_entry);
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}
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} else {
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/* Load firmware from flash. */
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if (!dinfo) {
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