grackle: general tidy-up and QOMify
This is the first step towards removing the old-style pci_grackle_init() function. Following on from the previous commit we can now pass the heathrow device as an object link and wire up the heathrow IRQs via qdev GPIOs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Mark Cave-Ayland
David Gibson
parent
a5ed75fe2e
commit
b0318ec10b
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@ -27,6 +27,8 @@
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#include "hw/pci/pci_host.h"
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#include "hw/ppc/mac.h"
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#include "hw/pci/pci.h"
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#include "hw/intc/heathrow_pic.h"
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#include "qapi/error.h"
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#include "trace.h"
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#define GRACKLE_PCI_HOST_BRIDGE(obj) \
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@ -35,6 +37,8 @@
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typedef struct GrackleState {
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PCIHostState parent_obj;
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HeathrowState *pic;
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qemu_irq irqs[4];
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MemoryRegion pci_mmio;
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MemoryRegion pci_hole;
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} GrackleState;
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@ -47,13 +51,22 @@ static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
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static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
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{
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qemu_irq *pic = opaque;
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GrackleState *s = opaque;
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trace_grackle_set_irq(irq_num, level);
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qemu_set_irq(pic[irq_num + 0x15], level);
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qemu_set_irq(s->irqs[irq_num], level);
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}
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PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
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static void grackle_init_irqs(GrackleState *s)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(s->irqs); i++) {
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s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), 0x15 + i);
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}
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}
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PCIBus *pci_grackle_init(uint32_t base, DeviceState *pic_dev,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io)
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{
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@ -63,60 +76,75 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
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GrackleState *d;
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dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
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object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
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&error_abort);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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phb = PCI_HOST_BRIDGE(dev);
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d = GRACKLE_PCI_HOST_BRIDGE(dev);
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memory_region_init(&d->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
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memory_region_init_alias(&d->pci_hole, OBJECT(s), "pci-hole", &d->pci_mmio,
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0x80000000ULL, 0x7e000000ULL);
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memory_region_add_subregion(address_space_mem, 0x80000000ULL,
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&d->pci_hole);
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phb->bus = pci_register_root_bus(dev, NULL,
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pci_grackle_set_irq,
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pci_grackle_map_irq,
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pic,
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&d->pci_mmio,
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address_space_io,
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0, 4, TYPE_PCI_BUS);
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pci_create_simple(phb->bus, 0, "grackle");
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qdev_init_nofail(dev);
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sysbus_mmio_map(s, 0, base);
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sysbus_mmio_map(s, 1, base + 0x00200000);
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return phb->bus;
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}
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static int pci_grackle_init_device(SysBusDevice *dev)
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static void grackle_realize(DeviceState *dev, Error **errp)
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{
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PCIHostState *phb;
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GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
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PCIHostState *phb = PCI_HOST_BRIDGE(dev);
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phb = PCI_HOST_BRIDGE(dev);
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phb->bus = pci_register_root_bus(dev, NULL,
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pci_grackle_set_irq,
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pci_grackle_map_irq,
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s,
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&s->pci_mmio,
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get_system_io(),
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0, 4, TYPE_PCI_BUS);
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memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
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dev, "pci-conf-idx", 0x1000);
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memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
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dev, "pci-data-idx", 0x1000);
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sysbus_init_mmio(dev, &phb->conf_mem);
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sysbus_init_mmio(dev, &phb->data_mem);
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return 0;
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pci_create_simple(phb->bus, 0, "grackle");
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grackle_init_irqs(s);
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}
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static void grackle_pci_host_realize(PCIDevice *d, Error **errp)
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static void grackle_init(Object *obj)
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{
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GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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PCIHostState *phb = PCI_HOST_BRIDGE(obj);
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memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
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memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio,
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0x80000000ULL, 0x7e000000ULL);
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memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops,
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DEVICE(obj), "pci-conf-idx", 0x1000);
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memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops,
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DEVICE(obj), "pci-data-idx", 0x1000);
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object_property_add_link(obj, "pic", TYPE_HEATHROW,
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(Object **) &s->pic,
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qdev_prop_allow_set_link_before_realize,
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0, NULL);
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sysbus_init_mmio(sbd, &phb->conf_mem);
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sysbus_init_mmio(sbd, &phb->data_mem);
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}
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static void grackle_pci_realize(PCIDevice *d, Error **errp)
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{
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d->config[0x09] = 0x01;
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}
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static void grackle_pci_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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k->realize = grackle_pci_host_realize;
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k->realize = grackle_pci_realize;
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k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
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k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
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k->revision = 0x00;
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@ -139,26 +167,26 @@ static const TypeInfo grackle_pci_info = {
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},
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};
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static void pci_grackle_class_init(ObjectClass *klass, void *data)
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static void grackle_class_init(ObjectClass *klass, void *data)
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{
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->init = pci_grackle_init_device;
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dc->realize = grackle_realize;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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static const TypeInfo grackle_pci_host_info = {
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static const TypeInfo grackle_host_info = {
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.name = TYPE_GRACKLE_PCI_HOST_BRIDGE,
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.parent = TYPE_PCI_HOST_BRIDGE,
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.instance_size = sizeof(GrackleState),
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.class_init = pci_grackle_class_init,
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.instance_init = grackle_init,
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.class_init = grackle_class_init,
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};
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static void grackle_register_types(void)
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{
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type_register_static(&grackle_pci_info);
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type_register_static(&grackle_pci_host_info);
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type_register_static(&grackle_host_info);
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}
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type_init(grackle_register_types)
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@ -79,7 +79,7 @@ void macio_init(PCIDevice *dev,
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/* Grackle PCI */
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#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
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PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
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PCIBus *pci_grackle_init(uint32_t base, DeviceState *pic_dev,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io);
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@ -261,7 +261,7 @@ static void ppc_heathrow_init(MachineState *machine)
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exit(1);
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}
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pci_bus = pci_grackle_init(0xfec00000, pic,
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pci_bus = pci_grackle_init(0xfec00000, pic_dev,
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get_system_memory(),
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get_system_io());
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pci_vga_init(pci_bus);
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