serial: separate serial_xmit and serial_watch_cb
serial_xmit starts transmission of whatever is in the transmitter register, THR or FIFO; serial_watch_cb is a wrapper around it and is only used as a qemu_chr_fe_add_watch callback. Tested-by: Bret Ketchum <bcketchum@gmail.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -106,6 +106,7 @@ do {} while (0)
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#endif
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static void serial_receive1(void *opaque, const uint8_t *buf, int size);
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static void serial_xmit(SerialState *s);
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static inline void recv_fifo_put(SerialState *s, uint8_t chr)
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{
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@ -223,10 +224,16 @@ static void serial_update_msl(SerialState *s)
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}
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}
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static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
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static gboolean serial_watch_cb(GIOChannel *chan, GIOCondition cond,
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void *opaque)
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{
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SerialState *s = opaque;
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serial_xmit(s);
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return FALSE;
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}
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static void serial_xmit(SerialState *s)
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{
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do {
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assert(!(s->lsr & UART_LSR_TEMT));
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if (s->tsr_retry == 0) {
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@ -254,9 +261,9 @@ static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
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} else if (qemu_chr_fe_write(s->chr, &s->tsr, 1) != 1) {
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if (s->tsr_retry < MAX_XMIT_RETRY &&
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qemu_chr_fe_add_watch(s->chr, G_IO_OUT|G_IO_HUP,
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serial_xmit, s) > 0) {
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serial_watch_cb, s) > 0) {
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s->tsr_retry++;
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return FALSE;
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return;
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}
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}
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s->tsr_retry = 0;
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@ -267,11 +274,8 @@ static gboolean serial_xmit(GIOChannel *chan, GIOCondition cond, void *opaque)
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s->last_xmit_ts = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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s->lsr |= UART_LSR_TEMT;
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return FALSE;
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}
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/* Setter for FCR.
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is_load flag means, that value is set while loading VM state
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and interrupt should not be invoked */
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@ -329,7 +333,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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s->lsr &= ~UART_LSR_TEMT;
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serial_update_irq(s);
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if (s->tsr_retry == 0) {
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serial_xmit(NULL, G_IO_OUT, s);
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serial_xmit(s);
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}
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}
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break;
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