target/ppc: Implement xxgenpcv[bhwd]m instruction
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220225210936.1749575-36-matheus.ferst@eldorado.org.br> Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Matheus Ferst
Cédric Le Goater
parent
1015fcab89
commit
b090f4f1e3
@ -494,6 +494,22 @@ DEF_HELPER_3(xvrspic, void, env, vsr, vsr)
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DEF_HELPER_3(xvrspim, void, env, vsr, vsr)
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DEF_HELPER_3(xvrspip, void, env, vsr, vsr)
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DEF_HELPER_3(xvrspiz, void, env, vsr, vsr)
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DEF_HELPER_FLAGS_2(XXGENPCVBM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVBM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVBM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVBM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVHM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVHM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVHM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVHM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVWM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVWM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVWM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVWM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVDM_be_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVDM_be_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVDM_le_exp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_FLAGS_2(XXGENPCVDM_le_comp, TCG_CALL_NO_RWG, void, vsr, avr)
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DEF_HELPER_4(xxextractuw, void, env, vsr, vsr, i32)
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DEF_HELPER_FLAGS_5(XXPERMX, TCG_CALL_NO_RWG, void, vsr, vsr, vsr, vsr, tl)
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DEF_HELPER_4(xxinsertw, void, env, vsr, vsr, i32)
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@ -119,6 +119,9 @@
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@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl
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%x_xt 0:1 21:5
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&X_imm5 xt imm:uint8_t vrb
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@X_imm5 ...... ..... imm:5 vrb:5 .......... . &X_imm5 xt=%x_xt
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&X_imm8 xt imm:uint8_t
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@X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt
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@ -615,6 +618,13 @@ XXPERMDI 111100 ..... ..... ..... 0 .. 01010 ... @XX3_dm
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XXSEL 111100 ..... ..... ..... ..... 11 .... @XX4
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## VSX Vector Generate PCV
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XXGENPCVBM 111100 ..... ..... ..... 1110010100 . @X_imm5
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XXGENPCVHM 111100 ..... ..... ..... 1110010101 . @X_imm5
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XXGENPCVWM 111100 ..... ..... ..... 1110110100 . @X_imm5
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XXGENPCVDM 111100 ..... ..... ..... 1110110101 . @X_imm5
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## VSX Vector Load Special Value Instruction
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LXVKQ 111100 ..... 11111 ..... 0101101000 . @X_uim5
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@ -1072,6 +1072,97 @@ void helper_VPERMR(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
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*r = result;
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}
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#define XXGENPCV(NAME, SZ) \
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void glue(helper_, glue(NAME, _be_exp))(ppc_vsr_t *t, ppc_vsr_t *b) \
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{ \
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ppc_vsr_t tmp; \
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\
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/* Initialize tmp with the result of an all-zeros mask */ \
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tmp.VsrD(0) = 0x1011121314151617; \
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tmp.VsrD(1) = 0x18191A1B1C1D1E1F; \
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\
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/* Iterate over the most significant byte of each element */ \
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for (int i = 0, j = 0; i < ARRAY_SIZE(b->u8); i += SZ) { \
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if (b->VsrB(i) & 0x80) { \
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/* Update each byte of the element */ \
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for (int k = 0; k < SZ; k++) { \
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tmp.VsrB(i + k) = j + k; \
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} \
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j += SZ; \
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} \
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} \
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\
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*t = tmp; \
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} \
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\
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void glue(helper_, glue(NAME, _be_comp))(ppc_vsr_t *t, ppc_vsr_t *b)\
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{ \
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ppc_vsr_t tmp = { .u64 = { 0, 0 } }; \
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\
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/* Iterate over the most significant byte of each element */ \
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for (int i = 0, j = 0; i < ARRAY_SIZE(b->u8); i += SZ) { \
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if (b->VsrB(i) & 0x80) { \
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/* Update each byte of the element */ \
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for (int k = 0; k < SZ; k++) { \
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tmp.VsrB(j + k) = i + k; \
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} \
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j += SZ; \
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} \
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} \
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\
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*t = tmp; \
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} \
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\
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void glue(helper_, glue(NAME, _le_exp))(ppc_vsr_t *t, ppc_vsr_t *b) \
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{ \
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ppc_vsr_t tmp; \
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\
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/* Initialize tmp with the result of an all-zeros mask */ \
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tmp.VsrD(0) = 0x1F1E1D1C1B1A1918; \
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tmp.VsrD(1) = 0x1716151413121110; \
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\
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/* Iterate over the most significant byte of each element */ \
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for (int i = 0, j = 0; i < ARRAY_SIZE(b->u8); i += SZ) { \
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/* Reverse indexing of "i" */ \
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const int idx = ARRAY_SIZE(b->u8) - i - SZ; \
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if (b->VsrB(idx) & 0x80) { \
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/* Update each byte of the element */ \
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for (int k = 0, rk = SZ - 1; k < SZ; k++, rk--) { \
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tmp.VsrB(idx + rk) = j + k; \
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} \
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j += SZ; \
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} \
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} \
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\
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*t = tmp; \
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} \
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\
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void glue(helper_, glue(NAME, _le_comp))(ppc_vsr_t *t, ppc_vsr_t *b)\
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{ \
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ppc_vsr_t tmp = { .u64 = { 0, 0 } }; \
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\
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/* Iterate over the most significant byte of each element */ \
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for (int i = 0, j = 0; i < ARRAY_SIZE(b->u8); i += SZ) { \
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if (b->VsrB(ARRAY_SIZE(b->u8) - i - SZ) & 0x80) { \
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/* Update each byte of the element */ \
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for (int k = 0, rk = SZ - 1; k < SZ; k++, rk--) { \
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/* Reverse indexing of "j" */ \
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const int idx = ARRAY_SIZE(b->u8) - j - SZ; \
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tmp.VsrB(idx + rk) = i + k; \
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} \
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j += SZ; \
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} \
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} \
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\
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*t = tmp; \
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}
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XXGENPCV(XXGENPCVBM, 1)
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XXGENPCV(XXGENPCVHM, 2)
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XXGENPCV(XXGENPCVWM, 4)
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XXGENPCV(XXGENPCVDM, 8)
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#undef XXGENPCV
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#if defined(HOST_WORDS_BIGENDIAN)
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#define VBPERMQ_INDEX(avr, i) ((avr)->u8[(i)])
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#define VBPERMD_INDEX(i) (i)
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@ -1256,6 +1256,49 @@ static bool trans_XXPERMX(DisasContext *ctx, arg_8RR_XX4_uim3 *a)
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return true;
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}
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#define XXGENPCV(NAME) \
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static bool trans_##NAME(DisasContext *ctx, arg_X_imm5 *a) \
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{ \
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TCGv_ptr xt, vrb; \
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\
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REQUIRE_INSNS_FLAGS2(ctx, ISA310); \
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REQUIRE_VSX(ctx); \
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\
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if (a->imm & ~0x3) { \
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gen_invalid(ctx); \
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return true; \
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} \
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\
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xt = gen_vsr_ptr(a->xt); \
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vrb = gen_avr_ptr(a->vrb); \
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\
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switch (a->imm) { \
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case 0b00000: /* Big-Endian expansion */ \
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glue(gen_helper_, glue(NAME, _be_exp))(xt, vrb); \
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break; \
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case 0b00001: /* Big-Endian compression */ \
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glue(gen_helper_, glue(NAME, _be_comp))(xt, vrb); \
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break; \
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case 0b00010: /* Little-Endian expansion */ \
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glue(gen_helper_, glue(NAME, _le_exp))(xt, vrb); \
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break; \
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case 0b00011: /* Little-Endian compression */ \
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glue(gen_helper_, glue(NAME, _le_comp))(xt, vrb); \
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break; \
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} \
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\
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tcg_temp_free_ptr(xt); \
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tcg_temp_free_ptr(vrb); \
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\
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return true; \
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}
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XXGENPCV(XXGENPCVBM)
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XXGENPCV(XXGENPCVHM)
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XXGENPCV(XXGENPCVWM)
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XXGENPCV(XXGENPCVDM)
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#undef XXGENPCV
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#define GEN_VSX_HELPER_VSX_MADD(name, op1, aop, mop, inval, type) \
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static void gen_##name(DisasContext *ctx) \
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{ \
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