tcg/optimize: Rename "mask" to "z_mask"
Prepare for tracking different masks by renaming this one. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
023462978a
commit
b1fde411d0
142
tcg/optimize.c
142
tcg/optimize.c
@ -41,7 +41,7 @@ typedef struct TempOptInfo {
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TCGTemp *prev_copy;
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TCGTemp *next_copy;
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uint64_t val;
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uint64_t mask;
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uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
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} TempOptInfo;
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static inline TempOptInfo *ts_info(TCGTemp *ts)
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@ -81,7 +81,7 @@ static void reset_ts(TCGTemp *ts)
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ti->next_copy = ts;
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ti->prev_copy = ts;
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ti->is_const = false;
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ti->mask = -1;
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ti->z_mask = -1;
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}
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static void reset_temp(TCGArg arg)
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@ -111,14 +111,14 @@ static void init_ts_info(TCGTempSet *temps_used, TCGTemp *ts)
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if (ts->kind == TEMP_CONST) {
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ti->is_const = true;
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ti->val = ts->val;
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ti->mask = ts->val;
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ti->z_mask = ts->val;
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if (TCG_TARGET_REG_BITS > 32 && ts->type == TCG_TYPE_I32) {
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/* High bits of a 32-bit quantity are garbage. */
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ti->mask |= ~0xffffffffull;
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ti->z_mask |= ~0xffffffffull;
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}
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} else {
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ti->is_const = false;
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ti->mask = -1;
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ti->z_mask = -1;
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}
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}
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@ -186,7 +186,7 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
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const TCGOpDef *def;
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TempOptInfo *di;
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TempOptInfo *si;
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uint64_t mask;
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uint64_t z_mask;
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TCGOpcode new_op;
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if (ts_are_copies(dst_ts, src_ts)) {
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@ -210,12 +210,12 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
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op->args[0] = dst;
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op->args[1] = src;
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mask = si->mask;
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z_mask = si->z_mask;
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if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
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/* High bits of the destination are now garbage. */
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mask |= ~0xffffffffull;
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z_mask |= ~0xffffffffull;
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}
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di->mask = mask;
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di->z_mask = z_mask;
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if (src_ts->type == dst_ts->type) {
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TempOptInfo *ni = ts_info(si->next_copy);
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@ -621,7 +621,7 @@ void tcg_optimize(TCGContext *s)
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}
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QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
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uint64_t mask, partmask, affected, tmp;
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uint64_t z_mask, partmask, affected, tmp;
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int nb_oargs, nb_iargs;
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TCGOpcode opc = op->opc;
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const TCGOpDef *def = &tcg_op_defs[opc];
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@ -855,170 +855,172 @@ void tcg_optimize(TCGContext *s)
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/* Simplify using known-zero bits. Currently only ops with a single
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output argument is supported. */
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mask = -1;
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z_mask = -1;
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affected = -1;
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switch (opc) {
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CASE_OP_32_64(ext8s):
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if ((arg_info(op->args[1])->mask & 0x80) != 0) {
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if ((arg_info(op->args[1])->z_mask & 0x80) != 0) {
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break;
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}
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QEMU_FALLTHROUGH;
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CASE_OP_32_64(ext8u):
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mask = 0xff;
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z_mask = 0xff;
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goto and_const;
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CASE_OP_32_64(ext16s):
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if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
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if ((arg_info(op->args[1])->z_mask & 0x8000) != 0) {
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break;
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}
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QEMU_FALLTHROUGH;
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CASE_OP_32_64(ext16u):
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mask = 0xffff;
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z_mask = 0xffff;
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goto and_const;
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case INDEX_op_ext32s_i64:
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if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
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if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
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break;
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}
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QEMU_FALLTHROUGH;
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case INDEX_op_ext32u_i64:
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mask = 0xffffffffU;
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z_mask = 0xffffffffU;
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goto and_const;
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CASE_OP_32_64(and):
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mask = arg_info(op->args[2])->mask;
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z_mask = arg_info(op->args[2])->z_mask;
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if (arg_is_const(op->args[2])) {
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and_const:
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affected = arg_info(op->args[1])->mask & ~mask;
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affected = arg_info(op->args[1])->z_mask & ~z_mask;
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}
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mask = arg_info(op->args[1])->mask & mask;
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z_mask = arg_info(op->args[1])->z_mask & z_mask;
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break;
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case INDEX_op_ext_i32_i64:
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if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
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if ((arg_info(op->args[1])->z_mask & 0x80000000) != 0) {
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break;
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}
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QEMU_FALLTHROUGH;
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case INDEX_op_extu_i32_i64:
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/* We do not compute affected as it is a size changing op. */
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mask = (uint32_t)arg_info(op->args[1])->mask;
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z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
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break;
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CASE_OP_32_64(andc):
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/* Known-zeros does not imply known-ones. Therefore unless
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op->args[2] is constant, we can't infer anything from it. */
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if (arg_is_const(op->args[2])) {
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mask = ~arg_info(op->args[2])->mask;
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z_mask = ~arg_info(op->args[2])->z_mask;
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goto and_const;
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}
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/* But we certainly know nothing outside args[1] may be set. */
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mask = arg_info(op->args[1])->mask;
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z_mask = arg_info(op->args[1])->z_mask;
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break;
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case INDEX_op_sar_i32:
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if (arg_is_const(op->args[2])) {
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tmp = arg_info(op->args[2])->val & 31;
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mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
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z_mask = (int32_t)arg_info(op->args[1])->z_mask >> tmp;
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}
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break;
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case INDEX_op_sar_i64:
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if (arg_is_const(op->args[2])) {
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tmp = arg_info(op->args[2])->val & 63;
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mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
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z_mask = (int64_t)arg_info(op->args[1])->z_mask >> tmp;
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}
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break;
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case INDEX_op_shr_i32:
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if (arg_is_const(op->args[2])) {
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tmp = arg_info(op->args[2])->val & 31;
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mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
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z_mask = (uint32_t)arg_info(op->args[1])->z_mask >> tmp;
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}
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break;
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case INDEX_op_shr_i64:
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if (arg_is_const(op->args[2])) {
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tmp = arg_info(op->args[2])->val & 63;
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mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
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z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> tmp;
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}
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break;
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case INDEX_op_extrl_i64_i32:
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mask = (uint32_t)arg_info(op->args[1])->mask;
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z_mask = (uint32_t)arg_info(op->args[1])->z_mask;
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break;
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case INDEX_op_extrh_i64_i32:
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mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
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z_mask = (uint64_t)arg_info(op->args[1])->z_mask >> 32;
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break;
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CASE_OP_32_64(shl):
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if (arg_is_const(op->args[2])) {
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tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
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mask = arg_info(op->args[1])->mask << tmp;
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z_mask = arg_info(op->args[1])->z_mask << tmp;
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}
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break;
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CASE_OP_32_64(neg):
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/* Set to 1 all bits to the left of the rightmost. */
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mask = -(arg_info(op->args[1])->mask
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& -arg_info(op->args[1])->mask);
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z_mask = -(arg_info(op->args[1])->z_mask
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& -arg_info(op->args[1])->z_mask);
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break;
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CASE_OP_32_64(deposit):
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mask = deposit64(arg_info(op->args[1])->mask,
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op->args[3], op->args[4],
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arg_info(op->args[2])->mask);
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z_mask = deposit64(arg_info(op->args[1])->z_mask,
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op->args[3], op->args[4],
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arg_info(op->args[2])->z_mask);
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break;
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CASE_OP_32_64(extract):
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mask = extract64(arg_info(op->args[1])->mask,
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op->args[2], op->args[3]);
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z_mask = extract64(arg_info(op->args[1])->z_mask,
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op->args[2], op->args[3]);
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if (op->args[2] == 0) {
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affected = arg_info(op->args[1])->mask & ~mask;
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affected = arg_info(op->args[1])->z_mask & ~z_mask;
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}
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break;
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CASE_OP_32_64(sextract):
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mask = sextract64(arg_info(op->args[1])->mask,
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op->args[2], op->args[3]);
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if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
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affected = arg_info(op->args[1])->mask & ~mask;
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z_mask = sextract64(arg_info(op->args[1])->z_mask,
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op->args[2], op->args[3]);
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if (op->args[2] == 0 && (tcg_target_long)z_mask >= 0) {
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affected = arg_info(op->args[1])->z_mask & ~z_mask;
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}
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break;
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CASE_OP_32_64(or):
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CASE_OP_32_64(xor):
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mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
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z_mask = arg_info(op->args[1])->z_mask
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| arg_info(op->args[2])->z_mask;
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break;
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case INDEX_op_clz_i32:
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case INDEX_op_ctz_i32:
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mask = arg_info(op->args[2])->mask | 31;
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z_mask = arg_info(op->args[2])->z_mask | 31;
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break;
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case INDEX_op_clz_i64:
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case INDEX_op_ctz_i64:
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mask = arg_info(op->args[2])->mask | 63;
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z_mask = arg_info(op->args[2])->z_mask | 63;
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break;
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case INDEX_op_ctpop_i32:
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mask = 32 | 31;
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z_mask = 32 | 31;
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break;
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case INDEX_op_ctpop_i64:
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mask = 64 | 63;
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z_mask = 64 | 63;
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break;
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CASE_OP_32_64(setcond):
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case INDEX_op_setcond2_i32:
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mask = 1;
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z_mask = 1;
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break;
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CASE_OP_32_64(movcond):
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mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
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z_mask = arg_info(op->args[3])->z_mask
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| arg_info(op->args[4])->z_mask;
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break;
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CASE_OP_32_64(ld8u):
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mask = 0xff;
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z_mask = 0xff;
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break;
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CASE_OP_32_64(ld16u):
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mask = 0xffff;
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z_mask = 0xffff;
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break;
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case INDEX_op_ld32u_i64:
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mask = 0xffffffffu;
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z_mask = 0xffffffffu;
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break;
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CASE_OP_32_64(qemu_ld):
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@ -1026,43 +1028,43 @@ void tcg_optimize(TCGContext *s)
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MemOpIdx oi = op->args[nb_oargs + nb_iargs];
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MemOp mop = get_memop(oi);
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if (!(mop & MO_SIGN)) {
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mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
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z_mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
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}
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}
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break;
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CASE_OP_32_64(bswap16):
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mask = arg_info(op->args[1])->mask;
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if (mask <= 0xffff) {
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z_mask = arg_info(op->args[1])->z_mask;
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if (z_mask <= 0xffff) {
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op->args[2] |= TCG_BSWAP_IZ;
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}
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mask = bswap16(mask);
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z_mask = bswap16(z_mask);
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switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
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case TCG_BSWAP_OZ:
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break;
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case TCG_BSWAP_OS:
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mask = (int16_t)mask;
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z_mask = (int16_t)z_mask;
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break;
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default: /* undefined high bits */
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mask |= MAKE_64BIT_MASK(16, 48);
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z_mask |= MAKE_64BIT_MASK(16, 48);
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break;
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}
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break;
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case INDEX_op_bswap32_i64:
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mask = arg_info(op->args[1])->mask;
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if (mask <= 0xffffffffu) {
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z_mask = arg_info(op->args[1])->z_mask;
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if (z_mask <= 0xffffffffu) {
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op->args[2] |= TCG_BSWAP_IZ;
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}
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mask = bswap32(mask);
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z_mask = bswap32(z_mask);
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switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
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case TCG_BSWAP_OZ:
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break;
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case TCG_BSWAP_OS:
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mask = (int32_t)mask;
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z_mask = (int32_t)z_mask;
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break;
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default: /* undefined high bits */
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mask |= MAKE_64BIT_MASK(32, 32);
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z_mask |= MAKE_64BIT_MASK(32, 32);
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break;
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}
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break;
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@ -1074,9 +1076,9 @@ void tcg_optimize(TCGContext *s)
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/* 32-bit ops generate 32-bit results. For the result is zero test
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below, we can ignore high bits, but for further optimizations we
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need to record that the high bits contain garbage. */
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partmask = mask;
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partmask = z_mask;
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if (!(def->flags & TCG_OPF_64BIT)) {
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mask |= ~(tcg_target_ulong)0xffffffffu;
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z_mask |= ~(tcg_target_ulong)0xffffffffu;
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partmask &= 0xffffffffu;
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affected &= 0xffffffffu;
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}
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@ -1472,7 +1474,7 @@ void tcg_optimize(TCGContext *s)
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vs the high word of the input. */
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do_setcond_high:
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reset_temp(op->args[0]);
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arg_info(op->args[0])->mask = 1;
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arg_info(op->args[0])->z_mask = 1;
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op->opc = INDEX_op_setcond_i32;
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op->args[1] = op->args[2];
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op->args[2] = op->args[4];
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@ -1498,7 +1500,7 @@ void tcg_optimize(TCGContext *s)
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}
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do_setcond_low:
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reset_temp(op->args[0]);
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arg_info(op->args[0])->mask = 1;
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arg_info(op->args[0])->z_mask = 1;
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op->opc = INDEX_op_setcond_i32;
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op->args[2] = op->args[3];
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op->args[3] = op->args[5];
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@ -1543,7 +1545,7 @@ void tcg_optimize(TCGContext *s)
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/* Default case: we know nothing about operation (or were unable
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to compute the operation result) so no propagation is done.
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We trash everything if the operation is the end of a basic
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block, otherwise we only trash the output args. "mask" is
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block, otherwise we only trash the output args. "z_mask" is
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the non-zero bits mask for the first output arg. */
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if (def->flags & TCG_OPF_BB_END) {
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memset(&temps_used, 0, sizeof(temps_used));
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@ -1554,7 +1556,7 @@ void tcg_optimize(TCGContext *s)
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/* Save the corresponding known-zero bits mask for the
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first output argument (only one supported so far). */
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if (i == 0) {
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arg_info(op->args[i])->mask = mask;
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arg_info(op->args[i])->z_mask = z_mask;
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}
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}
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}
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