pull-loongarch-20240229
V2: fix build error on mipsel -----BEGIN PGP SIGNATURE----- iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZeBrwAAKCRBAov/yOSY+ 33YXA/4+A5Bpe/3+mSAWZSUlluGTqUi0ILBYRMyX1RXovMx4uCRGr7PXzAf03yKS MZzlVzTuOK69WmTm/iTdYWOxkXisC3gzxL/wm8hP4lzh4c0dHrHRsKHqq6gR3+t2 ojdZn7TefeflnNqIhxXxgxb1OETofhBNnBJ74pvqxO7XV5SWnA== =J2Kb -----END PGP SIGNATURE----- Merge tag 'pull-loongarch-20240229' of https://gitlab.com/gaosong/qemu into staging pull-loongarch-20240229 V2: fix build error on mipsel # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZeBrwAAKCRBAov/yOSY+ # 33YXA/4+A5Bpe/3+mSAWZSUlluGTqUi0ILBYRMyX1RXovMx4uCRGr7PXzAf03yKS # MZzlVzTuOK69WmTm/iTdYWOxkXisC3gzxL/wm8hP4lzh4c0dHrHRsKHqq6gR3+t2 # ojdZn7TefeflnNqIhxXxgxb1OETofhBNnBJ74pvqxO7XV5SWnA== # =J2Kb # -----END PGP SIGNATURE----- # gpg: Signature made Thu 29 Feb 2024 11:34:24 GMT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20240229' of https://gitlab.com/gaosong/qemu: loongarch: Change the UEFI loading mode to loongarch Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
b21d5fd180
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@ -314,16 +314,39 @@ static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
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static void build_flash_aml(Aml *scope, LoongArchMachineState *lams)
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{
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Aml *dev, *crs;
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MemoryRegion *flash_mem;
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hwaddr flash_base = VIRT_FLASH_BASE;
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hwaddr flash_size = VIRT_FLASH_SIZE;
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hwaddr flash0_base;
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hwaddr flash0_size;
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hwaddr flash1_base;
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hwaddr flash1_size;
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flash_mem = pflash_cfi01_get_memory(lams->flash[0]);
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flash0_base = flash_mem->addr;
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flash0_size = memory_region_size(flash_mem);
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flash_mem = pflash_cfi01_get_memory(lams->flash[1]);
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flash1_base = flash_mem->addr;
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flash1_size = memory_region_size(flash_mem);
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dev = aml_device("FLS0");
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aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015")));
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aml_append(dev, aml_name_decl("_UID", aml_int(0)));
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crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(flash_base, flash_size, AML_READ_WRITE));
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aml_append(crs, aml_memory32_fixed(flash0_base, flash0_size,
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AML_READ_WRITE));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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dev = aml_device("FLS1");
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aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0015")));
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aml_append(dev, aml_name_decl("_UID", aml_int(1)));
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crs = aml_resource_template();
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aml_append(crs, aml_memory32_fixed(flash1_base, flash1_size,
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AML_READ_WRITE));
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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@ -54,7 +54,9 @@ struct loaderparams {
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const char *initrd_filename;
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};
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static void virt_flash_create(LoongArchMachineState *lams)
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static PFlashCFI01 *virt_flash_create1(LoongArchMachineState *lams,
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const char *name,
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const char *alias_prop_name)
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{
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DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
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@ -66,45 +68,78 @@ static void virt_flash_create(LoongArchMachineState *lams)
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qdev_prop_set_uint16(dev, "id1", 0x18);
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qdev_prop_set_uint16(dev, "id2", 0x00);
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qdev_prop_set_uint16(dev, "id3", 0x00);
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qdev_prop_set_string(dev, "name", "virt.flash");
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object_property_add_child(OBJECT(lams), "virt.flash", OBJECT(dev));
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object_property_add_alias(OBJECT(lams), "pflash",
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qdev_prop_set_string(dev, "name", name);
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object_property_add_child(OBJECT(lams), name, OBJECT(dev));
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object_property_add_alias(OBJECT(lams), alias_prop_name,
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OBJECT(dev), "drive");
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return PFLASH_CFI01(dev);
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}
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lams->flash = PFLASH_CFI01(dev);
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static void virt_flash_create(LoongArchMachineState *lams)
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{
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lams->flash[0] = virt_flash_create1(lams, "virt.flash0", "pflash0");
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lams->flash[1] = virt_flash_create1(lams, "virt.flash1", "pflash1");
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}
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static void virt_flash_map1(PFlashCFI01 *flash,
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hwaddr base, hwaddr size,
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MemoryRegion *sysmem)
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{
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DeviceState *dev = DEVICE(flash);
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BlockBackend *blk;
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hwaddr real_size = size;
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blk = pflash_cfi01_get_blk(flash);
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if (blk) {
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real_size = blk_getlength(blk);
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assert(real_size && real_size <= size);
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}
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assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE));
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assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX);
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qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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memory_region_add_subregion(sysmem, base,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
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}
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static void virt_flash_map(LoongArchMachineState *lams,
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MemoryRegion *sysmem)
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{
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PFlashCFI01 *flash = lams->flash;
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DeviceState *dev = DEVICE(flash);
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hwaddr base = VIRT_FLASH_BASE;
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hwaddr size = VIRT_FLASH_SIZE;
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assert(QEMU_IS_ALIGNED(size, VIRT_FLASH_SECTOR_SIZE));
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assert(size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX);
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qdev_prop_set_uint32(dev, "num-blocks", size / VIRT_FLASH_SECTOR_SIZE);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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memory_region_add_subregion(sysmem, base,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
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PFlashCFI01 *flash0 = lams->flash[0];
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PFlashCFI01 *flash1 = lams->flash[1];
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virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem);
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virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem);
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}
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static void fdt_add_flash_node(LoongArchMachineState *lams)
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{
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MachineState *ms = MACHINE(lams);
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char *nodename;
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MemoryRegion *flash_mem;
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hwaddr flash_base = VIRT_FLASH_BASE;
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hwaddr flash_size = VIRT_FLASH_SIZE;
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hwaddr flash0_base;
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hwaddr flash0_size;
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nodename = g_strdup_printf("/flash@%" PRIx64, flash_base);
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hwaddr flash1_base;
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hwaddr flash1_size;
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flash_mem = pflash_cfi01_get_memory(lams->flash[0]);
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flash0_base = flash_mem->addr;
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flash0_size = memory_region_size(flash_mem);
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flash_mem = pflash_cfi01_get_memory(lams->flash[1]);
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flash1_base = flash_mem->addr;
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flash1_size = memory_region_size(flash_mem);
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nodename = g_strdup_printf("/flash@%" PRIx64, flash0_base);
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qemu_fdt_add_subnode(ms->fdt, nodename);
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qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "cfi-flash");
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qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
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2, flash_base, 2, flash_size);
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2, flash0_base, 2, flash0_size,
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2, flash1_base, 2, flash1_size);
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qemu_fdt_setprop_cell(ms->fdt, nodename, "bank-width", 4);
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g_free(nodename);
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}
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@ -637,12 +672,32 @@ static void loongarch_firmware_init(LoongArchMachineState *lams)
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{
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char *filename = MACHINE(lams)->firmware;
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char *bios_name = NULL;
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int bios_size;
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int bios_size, i;
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BlockBackend *pflash_blk0;
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MemoryRegion *mr;
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lams->bios_loaded = false;
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/* Map legacy -drive if=pflash to machine properties */
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for (i = 0; i < ARRAY_SIZE(lams->flash); i++) {
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pflash_cfi01_legacy_drive(lams->flash[i],
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drive_get(IF_PFLASH, 0, i));
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}
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virt_flash_map(lams, get_system_memory());
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pflash_blk0 = pflash_cfi01_get_blk(lams->flash[0]);
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if (pflash_blk0) {
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if (filename) {
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error_report("cannot use both '-bios' and '-drive if=pflash'"
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"options at once");
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exit(1);
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}
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lams->bios_loaded = true;
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return;
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}
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if (filename) {
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bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename);
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if (!bios_name) {
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@ -650,21 +705,15 @@ static void loongarch_firmware_init(LoongArchMachineState *lams)
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exit(1);
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}
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bios_size = load_image_targphys(bios_name, VIRT_BIOS_BASE, VIRT_BIOS_SIZE);
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lams->flash[0]), 0);
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bios_size = load_image_mr(bios_name, mr);
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if (bios_size < 0) {
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error_report("Could not load ROM image '%s'", bios_name);
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exit(1);
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}
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g_free(bios_name);
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memory_region_init_ram(&lams->bios, NULL, "loongarch.bios",
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VIRT_BIOS_SIZE, &error_fatal);
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memory_region_set_readonly(&lams->bios, true);
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memory_region_add_subregion(get_system_memory(), VIRT_BIOS_BASE, &lams->bios);
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lams->bios_loaded = true;
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}
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}
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static void reset_load_elf(void *opaque)
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@ -18,10 +18,12 @@
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#define VIRT_FWCFG_BASE 0x1e020000UL
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#define VIRT_BIOS_BASE 0x1c000000UL
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#define VIRT_BIOS_SIZE (4 * MiB)
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#define VIRT_BIOS_SIZE (16 * MiB)
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#define VIRT_FLASH_SECTOR_SIZE (128 * KiB)
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#define VIRT_FLASH_BASE 0x1d000000UL
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#define VIRT_FLASH_SIZE (16 * MiB)
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#define VIRT_FLASH0_BASE VIRT_BIOS_BASE
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#define VIRT_FLASH0_SIZE VIRT_BIOS_SIZE
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#define VIRT_FLASH1_BASE 0x1d000000UL
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#define VIRT_FLASH1_SIZE (16 * MiB)
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#define VIRT_LOWMEM_BASE 0
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#define VIRT_LOWMEM_SIZE 0x10000000
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@ -49,7 +51,7 @@ struct LoongArchMachineState {
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int fdt_size;
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DeviceState *platform_bus_dev;
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PCIBus *pci_bus;
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PFlashCFI01 *flash;
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PFlashCFI01 *flash[2];
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MemoryRegion system_iocsr;
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MemoryRegion iocsr_mem;
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AddressSpace as_iocsr;
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