Use g_new() & friends where that makes obvious sense

g_new(T, n) is neater than g_malloc(sizeof(T) * n).  It's also safer,
for two reasons.  One, it catches multiplication overflowing size_t.
Two, it returns T * rather than void *, which lets the compiler catch
more type errors.

This commit only touches allocations with size arguments of the form
sizeof(T).

Patch created mechanically with:

    $ spatch --in-place --sp-file scripts/coccinelle/use-g_new-etc.cocci \
	     --macro-file scripts/cocci-macro-file.h FILES...

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <20220315144156.1595462-4-armbru@redhat.com>
Reviewed-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
e2k-bsd-user
Markus Armbruster 11 months ago
parent 1366244ab6
commit b21e238037
  1. 6
      accel/kvm/kvm-all.c
  2. 2
      accel/tcg/tcg-accel-ops-mttcg.c
  3. 4
      accel/tcg/tcg-accel-ops-rr.c
  4. 4
      audio/audio.c
  5. 6
      audio/audio_legacy.c
  6. 2
      audio/dsoundaudio.c
  7. 6
      audio/jackaudio.c
  8. 4
      audio/paaudio.c
  9. 2
      backends/cryptodev.c
  10. 2
      contrib/vhost-user-gpu/vhost-user-gpu.c
  11. 4
      cpus-common.c
  12. 2
      dump/dump.c
  13. 2
      hw/acpi/hmat.c
  14. 2
      hw/audio/intel-hda.c
  15. 2
      hw/char/parallel.c
  16. 2
      hw/char/riscv_htif.c
  17. 6
      hw/char/virtio-serial-bus.c
  18. 2
      hw/core/irq.c
  19. 2
      hw/core/reset.c
  20. 2
      hw/display/pxa2xx_lcd.c
  21. 2
      hw/display/tc6393xb.c
  22. 4
      hw/display/virtio-gpu.c
  23. 4
      hw/display/xenfb.c
  24. 4
      hw/dma/rc4030.c
  25. 4
      hw/i2c/core.c
  26. 2
      hw/i2c/i2c_mux_pca954x.c
  27. 4
      hw/i386/amd_iommu.c
  28. 2
      hw/i386/intel_iommu.c
  29. 10
      hw/i386/xen/xen-hvm.c
  30. 14
      hw/i386/xen/xen-mapcache.c
  31. 2
      hw/input/lasips2.c
  32. 2
      hw/input/pckbd.c
  33. 4
      hw/input/ps2.c
  34. 2
      hw/input/pxa2xx_keypad.c
  35. 3
      hw/input/tsc2005.c
  36. 6
      hw/intc/riscv_aclint.c
  37. 2
      hw/intc/xics.c
  38. 2
      hw/m68k/virt.c
  39. 2
      hw/mips/mipssim.c
  40. 2
      hw/misc/applesmc.c
  41. 2
      hw/misc/imx6_src.c
  42. 4
      hw/misc/ivshmem.c
  43. 4
      hw/net/virtio-net.c
  44. 2
      hw/nvme/ns.c
  45. 2
      hw/pci-host/pnv_phb3.c
  46. 2
      hw/pci-host/pnv_phb4.c
  47. 2
      hw/pci/pcie_sriov.c
  48. 2
      hw/ppc/e500.c
  49. 8
      hw/ppc/ppc.c
  50. 4
      hw/ppc/ppc405_boards.c
  51. 18
      hw/ppc/ppc405_uc.c
  52. 2
      hw/ppc/ppc4xx_devs.c
  53. 4
      hw/ppc/ppc_booke.c
  54. 2
      hw/ppc/spapr.c
  55. 2
      hw/ppc/spapr_events.c
  56. 2
      hw/ppc/spapr_hcall.c
  57. 3
      hw/ppc/spapr_numa.c
  58. 2
      hw/rdma/vmw/pvrdma_dev_ring.c
  59. 6
      hw/rdma/vmw/pvrdma_qp_ops.c
  60. 4
      hw/sh4/r2d.c
  61. 2
      hw/sh4/sh7750.c
  62. 2
      hw/sparc/leon3.c
  63. 4
      hw/sparc64/sparc64.c
  64. 2
      hw/timer/arm_timer.c
  65. 2
      hw/timer/slavio_timer.c
  66. 4
      hw/vfio/pci.c
  67. 4
      hw/vfio/platform.c
  68. 2
      hw/virtio/virtio-crypto.c
  69. 2
      hw/virtio/virtio-iommu.c
  70. 5
      hw/virtio/virtio.c
  71. 2
      hw/xtensa/xtfpga.c
  72. 2
      include/qemu/timer.h
  73. 2
      linux-user/syscall.c
  74. 4
      migration/dirtyrate.c
  75. 4
      migration/multifd-zlib.c
  76. 2
      migration/ram.c
  77. 2
      monitor/misc.c
  78. 2
      monitor/qmp-cmds.c
  79. 8
      qga/commands-win32.c
  80. 2
      qga/commands.c
  81. 2
      qom/qom-qmp-cmds.c
  82. 4
      replay/replay-char.c
  83. 10
      replay/replay-events.c
  84. 4
      softmmu/bootdevice.c
  85. 4
      softmmu/dma-helpers.c
  86. 2
      softmmu/memory_mapping.c
  87. 2
      target/i386/cpu-sysemu.c
  88. 4
      target/i386/hax/hax-accel-ops.c
  89. 4
      target/i386/nvmm/nvmm-accel-ops.c
  90. 4
      target/i386/whpx/whpx-accel-ops.c
  91. 2
      target/i386/whpx/whpx-all.c
  92. 2
      target/s390x/cpu-sysemu.c
  93. 2
      tests/unit/test-hbitmap.c
  94. 14
      tests/unit/test-qmp-cmds.c
  95. 2
      tests/unit/test-qobject-output-visitor.c
  96. 42
      tests/unit/test-vmstate.c
  97. 2
      ui/vnc-enc-tight.c
  98. 2
      util/envlist.c
  99. 2
      util/hbitmap.c
  100. 2
      util/main-loop.c
  101. Some files were not shown because too many files have changed in this diff Show More

@ -1646,7 +1646,7 @@ void kvm_memory_listener_register(KVMState *s, KVMMemoryListener *kml,
{
int i;
kml->slots = g_malloc0(s->nr_slots * sizeof(KVMSlot));
kml->slots = g_new0(KVMSlot, s->nr_slots);
kml->as_id = as_id;
for (i = 0; i < s->nr_slots; i++) {
@ -1941,7 +1941,7 @@ int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg)
return virq;
}
route = g_malloc0(sizeof(KVMMSIRoute));
route = g_new0(KVMMSIRoute, 1);
route->kroute.gsi = virq;
route->kroute.type = KVM_IRQ_ROUTING_MSI;
route->kroute.flags = 0;
@ -3244,7 +3244,7 @@ int kvm_insert_breakpoint(CPUState *cpu, target_ulong addr,
return 0;
}
bp = g_malloc(sizeof(struct kvm_sw_breakpoint));
bp = g_new(struct kvm_sw_breakpoint, 1);
bp->pc = addr;
bp->use_count = 1;
err = kvm_arch_insert_sw_breakpoint(cpu, bp);

@ -143,7 +143,7 @@ void mttcg_start_vcpu_thread(CPUState *cpu)
g_assert(tcg_enabled());
tcg_cpu_init_cflags(cpu, current_machine->smp.max_cpus > 1);
cpu->thread = g_malloc0(sizeof(QemuThread));
cpu->thread = g_new0(QemuThread, 1);
cpu->halt_cond = g_malloc0(sizeof(QemuCond));
qemu_cond_init(cpu->halt_cond);

@ -280,8 +280,8 @@ void rr_start_vcpu_thread(CPUState *cpu)
tcg_cpu_init_cflags(cpu, false);
if (!single_tcg_cpu_thread) {
cpu->thread = g_malloc0(sizeof(QemuThread));
cpu->halt_cond = g_malloc0(sizeof(QemuCond));
cpu->thread = g_new0(QemuThread, 1);
cpu->halt_cond = g_new0(QemuCond, 1);
qemu_cond_init(cpu->halt_cond);
/* share a single thread for all cpus with TCG */

@ -1733,7 +1733,7 @@ static AudioState *audio_init(Audiodev *dev, const char *name)
audio_validate_opts(dev, &error_abort);
}
s = g_malloc0(sizeof(AudioState));
s = g_new0(AudioState, 1);
s->dev = dev;
QLIST_INIT (&s->hw_head_out);
@ -2108,7 +2108,7 @@ void audio_parse_option(const char *opt)
audio_validate_opts(dev, &error_fatal);
e = g_malloc0(sizeof(AudiodevListEntry));
e = g_new0(AudiodevListEntry, 1);
e->dev = dev;
QSIMPLEQ_INSERT_TAIL(&audiodevs, e, next);
}

@ -328,8 +328,8 @@ static void handle_per_direction(
static AudiodevListEntry *legacy_opt(const char *drvname)
{
AudiodevListEntry *e = g_malloc0(sizeof(AudiodevListEntry));
e->dev = g_malloc0(sizeof(Audiodev));
AudiodevListEntry *e = g_new0(AudiodevListEntry, 1);
e->dev = g_new0(Audiodev, 1);
e->dev->id = g_strdup(drvname);
e->dev->driver = qapi_enum_parse(
&AudiodevDriver_lookup, drvname, -1, &error_abort);
@ -508,7 +508,7 @@ static void lv_free(Visitor *v)
static Visitor *legacy_visitor_new(void)
{
LegacyPrintVisitor *lv = g_malloc0(sizeof(LegacyPrintVisitor));
LegacyPrintVisitor *lv = g_new0(LegacyPrintVisitor, 1);
lv->visitor.start_struct = lv_start_struct;
lv->visitor.end_struct = lv_end_struct;

@ -623,7 +623,7 @@ static void *dsound_audio_init(Audiodev *dev)
{
int err;
HRESULT hr;
dsound *s = g_malloc0(sizeof(dsound));
dsound *s = g_new0(dsound, 1);
AudiodevDsoundOptions *dso;
assert(dev->driver == AUDIODEV_DRIVER_DSOUND);

@ -97,9 +97,9 @@ static void qjack_buffer_create(QJackBuffer *buffer, int channels, int frames)
buffer->used = 0;
buffer->rptr = 0;
buffer->wptr = 0;
buffer->data = g_malloc(channels * sizeof(float *));
buffer->data = g_new(float *, channels);
for (int i = 0; i < channels; ++i) {
buffer->data[i] = g_malloc(frames * sizeof(float));
buffer->data[i] = g_new(float, frames);
}
}
@ -453,7 +453,7 @@ static int qjack_client_init(QJackClient *c)
jack_on_shutdown(c->client, qjack_shutdown, c);
/* allocate and register the ports */
c->port = g_malloc(sizeof(jack_port_t *) * c->nchannels);
c->port = g_new(jack_port_t *, c->nchannels);
for (int i = 0; i < c->nchannels; ++i) {
char port_name[16];

@ -760,7 +760,7 @@ static int qpa_validate_per_direction_opts(Audiodev *dev,
/* common */
static void *qpa_conn_init(const char *server)
{
PAConnection *c = g_malloc0(sizeof(PAConnection));
PAConnection *c = g_new0(PAConnection, 1);
QTAILQ_INSERT_TAIL(&pa_conns, c, list);
c->mainloop = pa_threaded_mainloop_new();
@ -849,7 +849,7 @@ static void *qpa_audio_init(Audiodev *dev)
return NULL;
}
g = g_malloc0(sizeof(paaudio));
g = g_new0(paaudio, 1);
server = popts->has_server ? popts->server : NULL;
g->dev = dev;

@ -39,7 +39,7 @@ cryptodev_backend_new_client(const char *model,
{
CryptoDevBackendClient *cc;
cc = g_malloc0(sizeof(CryptoDevBackendClient));
cc = g_new0(CryptoDevBackendClient, 1);
cc->model = g_strdup(model);
if (name) {
cc->name = g_strdup(name);

@ -455,7 +455,7 @@ vg_create_mapping_iov(VuGpu *g,
return -1;
}
*iov = g_malloc0(sizeof(struct iovec) * ab->nr_entries);
*iov = g_new0(struct iovec, ab->nr_entries);
for (i = 0; i < ab->nr_entries; i++) {
uint64_t len = ents[i].length;
(*iov)[i].iov_len = ents[i].length;

@ -160,7 +160,7 @@ void async_run_on_cpu(CPUState *cpu, run_on_cpu_func func, run_on_cpu_data data)
{
struct qemu_work_item *wi;
wi = g_malloc0(sizeof(struct qemu_work_item));
wi = g_new0(struct qemu_work_item, 1);
wi->func = func;
wi->data = data;
wi->free = true;
@ -305,7 +305,7 @@ void async_safe_run_on_cpu(CPUState *cpu, run_on_cpu_func func,
{
struct qemu_work_item *wi;
wi = g_malloc0(sizeof(struct qemu_work_item));
wi = g_new0(struct qemu_work_item, 1);
wi->func = func;
wi->data = data;
wi->free = true;

@ -2041,7 +2041,7 @@ void qmp_dump_guest_memory(bool paging, const char *file,
DumpGuestMemoryCapability *qmp_query_dump_guest_memory_capability(Error **errp)
{
DumpGuestMemoryCapability *cap =
g_malloc0(sizeof(DumpGuestMemoryCapability));
g_new0(DumpGuestMemoryCapability, 1);
DumpGuestMemoryFormatList **tail = &cap->formats;
/* elf is always available */

@ -128,7 +128,7 @@ static void build_hmat_lb(GArray *table_data, HMAT_LB_Info *hmat_lb,
}
/* Latency or Bandwidth Entries */
entry_list = g_malloc0(num_initiator * num_target * sizeof(uint16_t));
entry_list = g_new0(uint16_t, num_initiator * num_target);
for (i = 0; i < hmat_lb->list->len; i++) {
lb_data = &g_array_index(hmat_lb->list, HMAT_LB_Data, i);
index = lb_data->initiator * num_target + lb_data->target;

@ -473,7 +473,7 @@ static void intel_hda_parse_bdl(IntelHDAState *d, IntelHDAStream *st)
addr = intel_hda_addr(st->bdlp_lbase, st->bdlp_ubase);
st->bentries = st->lvi +1;
g_free(st->bpl);
st->bpl = g_malloc(sizeof(bpl) * st->bentries);
st->bpl = g_new(bpl, st->bentries);
for (i = 0; i < st->bentries; i++, addr += 16) {
pci_dma_read(&d->pci, addr, buf, 16);
st->bpl[i].addr = le64_to_cpu(*(uint64_t *)buf);

@ -622,7 +622,7 @@ bool parallel_mm_init(MemoryRegion *address_space,
{
ParallelState *s;
s = g_malloc0(sizeof(ParallelState));
s = g_new0(ParallelState, 1);
s->irq = irq;
qemu_chr_fe_init(&s->chr, chr, &error_abort);
s->it_shift = it_shift;

@ -248,7 +248,7 @@ HTIFState *htif_mm_init(MemoryRegion *address_space, MemoryRegion *main_mem,
tohost_offset = tohost_addr - base;
fromhost_offset = fromhost_addr - base;
HTIFState *s = g_malloc0(sizeof(HTIFState));
HTIFState *s = g_new0(HTIFState, 1);
s->address_space = address_space;
s->main_mem = main_mem;
s->main_mem_ram_ptr = memory_region_get_ram_ptr(main_mem);

@ -1055,10 +1055,8 @@ static void virtio_serial_device_realize(DeviceState *dev, Error **errp)
QTAILQ_INIT(&vser->ports);
vser->bus.max_nr_ports = vser->serial.max_virtserial_ports;
vser->ivqs = g_malloc(vser->serial.max_virtserial_ports
* sizeof(VirtQueue *));
vser->ovqs = g_malloc(vser->serial.max_virtserial_ports
* sizeof(VirtQueue *));
vser->ivqs = g_new(VirtQueue *, vser->serial.max_virtserial_ports);
vser->ovqs = g_new(VirtQueue *, vser->serial.max_virtserial_ports);
/* Add a queue for host to guest transfers for port 0 (backward compat) */
vser->ivqs[0] = virtio_add_queue(vdev, 128, handle_input);

@ -115,7 +115,7 @@ static void qemu_splitirq(void *opaque, int line, int level)
qemu_irq qemu_irq_split(qemu_irq irq1, qemu_irq irq2)
{
qemu_irq *s = g_malloc0(2 * sizeof(qemu_irq));
qemu_irq *s = g_new0(qemu_irq, 2);
s[0] = irq1;
s[1] = irq2;
return qemu_allocate_irq(qemu_splitirq, s, 0);

@ -40,7 +40,7 @@ static QTAILQ_HEAD(, QEMUResetEntry) reset_handlers =
void qemu_register_reset(QEMUResetHandler *func, void *opaque)
{
QEMUResetEntry *re = g_malloc0(sizeof(QEMUResetEntry));
QEMUResetEntry *re = g_new0(QEMUResetEntry, 1);
re->func = func;
re->opaque = opaque;

@ -1427,7 +1427,7 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem,
{
PXA2xxLCDState *s;
s = (PXA2xxLCDState *) g_malloc0(sizeof(PXA2xxLCDState));
s = g_new0(PXA2xxLCDState, 1);
s->invalidated = 1;
s->irq = irq;
s->sysmem = sysmem;

@ -540,7 +540,7 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
},
};
s = (TC6393xbState *) g_malloc0(sizeof(TC6393xbState));
s = g_new0(TC6393xbState, 1);
s->irq = irq;
s->gpio_in = qemu_allocate_irqs(tc6393xb_gpio_set, s, TC6393XB_GPIOS);

@ -831,9 +831,9 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
}
if (!(v % 16)) {
*iov = g_realloc(*iov, sizeof(struct iovec) * (v + 16));
*iov = g_renew(struct iovec, *iov, v + 16);
if (addr) {
*addr = g_realloc(*addr, sizeof(uint64_t) * (v + 16));
*addr = g_renew(uint64_t, *addr, v + 16);
}
}
(*iov)[v].iov_base = map;

@ -496,8 +496,8 @@ static int xenfb_map_fb(struct XenFB *xenfb)
n_fbdirs = xenfb->fbpages * mode / 8;
n_fbdirs = DIV_ROUND_UP(n_fbdirs, XC_PAGE_SIZE);
pgmfns = g_malloc0(sizeof(xen_pfn_t) * n_fbdirs);
fbmfns = g_malloc0(sizeof(xen_pfn_t) * xenfb->fbpages);
pgmfns = g_new0(xen_pfn_t, n_fbdirs);
fbmfns = g_new0(xen_pfn_t, xenfb->fbpages);
xenfb_copy_mfns(mode, n_fbdirs, pgmfns, pd);
map = xenforeignmemory_map(xen_fmem, xenfb->c.xendev.dom,

@ -646,8 +646,8 @@ static rc4030_dma *rc4030_allocate_dmas(void *opaque, int n)
struct rc4030DMAState *p;
int i;
s = (rc4030_dma *)g_new0(rc4030_dma, n);
p = (struct rc4030DMAState *)g_new0(struct rc4030DMAState, n);
s = g_new0(rc4030_dma, n);
p = g_new0(struct rc4030DMAState, n);
for (i = 0; i < n; i++) {
p->opaque = opaque;
p->n = i;

@ -274,7 +274,7 @@ static int i2c_slave_post_load(void *opaque, int version_id)
bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev)));
if ((bus->saved_address == dev->address) ||
(bus->saved_address == I2C_BROADCAST)) {
node = g_malloc(sizeof(struct I2CNode));
node = g_new(struct I2CNode, 1);
node->elt = dev;
QLIST_INSERT_HEAD(&bus->current_devs, node, next);
}
@ -319,7 +319,7 @@ static bool i2c_slave_match(I2CSlave *candidate, uint8_t address,
bool broadcast, I2CNodeList *current_devs)
{
if ((candidate->address == address) || (broadcast)) {
I2CNode *node = g_malloc(sizeof(struct I2CNode));
I2CNode *node = g_new(struct I2CNode, 1);
node->elt = candidate;
QLIST_INSERT_HEAD(current_devs, node, next);
return true;

@ -71,7 +71,7 @@ static bool pca954x_match(I2CSlave *candidate, uint8_t address,
/* They are talking to the mux itself (or all devices enabled). */
if ((candidate->address == address) || broadcast) {
I2CNode *node = g_malloc(sizeof(struct I2CNode));
I2CNode *node = g_new(struct I2CNode, 1);
node->elt = candidate;
QLIST_INSERT_HEAD(current_devs, node, next);
if (!broadcast) {

@ -1405,7 +1405,7 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
/* allocate memory during the first run */
if (!iommu_as) {
iommu_as = g_malloc0(sizeof(AMDVIAddressSpace *) * PCI_DEVFN_MAX);
iommu_as = g_new0(AMDVIAddressSpace *, PCI_DEVFN_MAX);
s->address_spaces[bus_num] = iommu_as;
}
@ -1413,7 +1413,7 @@ static AddressSpace *amdvi_host_dma_iommu(PCIBus *bus, void *opaque, int devfn)
if (!iommu_as[devfn]) {
snprintf(name, sizeof(name), "amd_iommu_devfn_%d", devfn);
iommu_as[devfn] = g_malloc0(sizeof(AMDVIAddressSpace));
iommu_as[devfn] = g_new0(AMDVIAddressSpace, 1);
iommu_as[devfn]->bus_num = (uint8_t)bus_num;
iommu_as[devfn]->devfn = (uint8_t)devfn;
iommu_as[devfn]->iommu_state = s;

@ -3416,7 +3416,7 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn)
if (!vtd_dev_as) {
snprintf(name, sizeof(name), "vtd-%02x.%x", PCI_SLOT(devfn),
PCI_FUNC(devfn));
vtd_bus->dev_as[devfn] = vtd_dev_as = g_malloc0(sizeof(VTDAddressSpace));
vtd_bus->dev_as[devfn] = vtd_dev_as = g_new0(VTDAddressSpace, 1);
vtd_dev_as->bus = bus;
vtd_dev_as->devfn = (uint8_t)devfn;

@ -396,7 +396,7 @@ go_physmap:
mr_name = memory_region_name(mr);
physmap = g_malloc(sizeof(XenPhysmap));
physmap = g_new(XenPhysmap, 1);
physmap->start_addr = start_addr;
physmap->size = size;
@ -1281,7 +1281,7 @@ static void xen_read_physmap(XenIOState *state)
return;
for (i = 0; i < num; i++) {
physmap = g_malloc(sizeof (XenPhysmap));
physmap = g_new(XenPhysmap, 1);
physmap->phys_offset = strtoull(entries[i], NULL, 16);
snprintf(path, sizeof(path),
"/local/domain/0/device-model/%d/physmap/%s/start_addr",
@ -1410,7 +1410,7 @@ void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion **ram_memory)
xen_pfn_t ioreq_pfn;
XenIOState *state;
state = g_malloc0(sizeof (XenIOState));
state = g_new0(XenIOState, 1);
state->xce_handle = xenevtchn_open(NULL, 0);
if (state->xce_handle == NULL) {
@ -1463,7 +1463,7 @@ void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion **ram_memory)
}
/* Note: cpus is empty at this point in init */
state->cpu_by_vcpu_id = g_malloc0(max_cpus * sizeof(CPUState *));
state->cpu_by_vcpu_id = g_new0(CPUState *, max_cpus);
rc = xen_set_ioreq_server_state(xen_domid, state->ioservid, true);
if (rc < 0) {
@ -1472,7 +1472,7 @@ void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion **ram_memory)
goto err;
}
state->ioreq_local_port = g_malloc0(max_cpus * sizeof (evtchn_port_t));
state->ioreq_local_port = g_new0(evtchn_port_t, max_cpus);
/* FIXME: how about if we overflow the page here? */
for (i = 0; i < max_cpus; i++) {

@ -108,7 +108,7 @@ void xen_map_cache_init(phys_offset_to_gaddr_t f, void *opaque)
unsigned long size;
struct rlimit rlimit_as;
mapcache = g_malloc0(sizeof (MapCache));
mapcache = g_new0(MapCache, 1);
mapcache->phys_offset_to_gaddr = f;
mapcache->opaque = opaque;
@ -164,8 +164,8 @@ static void xen_remap_bucket(MapCacheEntry *entry,
trace_xen_remap_bucket(address_index);
pfns = g_malloc0(nb_pfn * sizeof (xen_pfn_t));
err = g_malloc0(nb_pfn * sizeof (int));
pfns = g_new0(xen_pfn_t, nb_pfn);
err = g_new0(int, nb_pfn);
if (entry->vaddr_base != NULL) {
if (!(entry->flags & XEN_MAPCACHE_ENTRY_DUMMY)) {
@ -231,8 +231,8 @@ static void xen_remap_bucket(MapCacheEntry *entry,
entry->vaddr_base = vaddr_base;
entry->paddr_index = address_index;
entry->size = size;
entry->valid_mapping = (unsigned long *) g_malloc0(sizeof(unsigned long) *
BITS_TO_LONGS(size >> XC_PAGE_SHIFT));
entry->valid_mapping = g_new0(unsigned long,
BITS_TO_LONGS(size >> XC_PAGE_SHIFT));
if (dummy) {
entry->flags |= XEN_MAPCACHE_ENTRY_DUMMY;
@ -319,7 +319,7 @@ tryagain:
pentry = free_pentry;
}
if (!entry) {
entry = g_malloc0(sizeof (MapCacheEntry));
entry = g_new0(MapCacheEntry, 1);
pentry->next = entry;
xen_remap_bucket(entry, NULL, cache_size, address_index, dummy);
} else if (!entry->lock) {
@ -353,7 +353,7 @@ tryagain:
mapcache->last_entry = entry;
if (lock) {
MapCacheRev *reventry = g_malloc0(sizeof(MapCacheRev));
MapCacheRev *reventry = g_new0(MapCacheRev, 1);
entry->lock++;
if (entry->lock == 0) {
fprintf(stderr,

@ -266,7 +266,7 @@ void lasips2_init(MemoryRegion *address_space,
{
LASIPS2State *s;
s = g_malloc0(sizeof(LASIPS2State));
s = g_new0(LASIPS2State, 1);
s->irq = irq;
s->mouse.id = 1;

@ -649,7 +649,7 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
MemoryRegion *region, ram_addr_t size,
hwaddr mask)
{
KBDState *s = g_malloc0(sizeof(KBDState));
KBDState *s = g_new0(KBDState, 1);
s->irq_kbd = kbd_irq;
s->irq_mouse = mouse_irq;

@ -1226,7 +1226,7 @@ static QemuInputHandler ps2_keyboard_handler = {
void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg)
{
PS2KbdState *s = (PS2KbdState *)g_malloc0(sizeof(PS2KbdState));
PS2KbdState *s = g_new0(PS2KbdState, 1);
trace_ps2_kbd_init(s);
s->common.update_irq = update_irq;
@ -1248,7 +1248,7 @@ static QemuInputHandler ps2_mouse_handler = {
void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg)
{
PS2MouseState *s = (PS2MouseState *)g_malloc0(sizeof(PS2MouseState));
PS2MouseState *s = g_new0(PS2MouseState, 1);
trace_ps2_mouse_init(s);
s->common.update_irq = update_irq;

@ -306,7 +306,7 @@ PXA2xxKeyPadState *pxa27x_keypad_init(MemoryRegion *sysmem,
{
PXA2xxKeyPadState *s;
s = (PXA2xxKeyPadState *) g_malloc0(sizeof(PXA2xxKeyPadState));
s = g_new0(PXA2xxKeyPadState, 1);
s->irq = irq;
memory_region_init_io(&s->iomem, NULL, &pxa2xx_keypad_ops, s,

@ -489,8 +489,7 @@ void *tsc2005_init(qemu_irq pintdav)
{
TSC2005State *s;
s = (TSC2005State *)
g_malloc0(sizeof(TSC2005State));
s = g_new0(TSC2005State, 1);
s->x = 400;
s->y = 240;
s->pressure = false;

@ -235,7 +235,7 @@ static void riscv_aclint_mtimer_realize(DeviceState *dev, Error **errp)
s, TYPE_RISCV_ACLINT_MTIMER, s->aperture_size);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
s->timer_irqs = g_malloc(sizeof(qemu_irq) * s->num_harts);
s->timer_irqs = g_new(qemu_irq, s->num_harts);
qdev_init_gpio_out(dev, s->timer_irqs, s->num_harts);
/* Claim timer interrupt bits */
@ -292,7 +292,7 @@ DeviceState *riscv_aclint_mtimer_create(hwaddr addr, hwaddr size,
RISCVCPU *rvcpu = RISCV_CPU(cpu);
CPURISCVState *env = cpu ? cpu->env_ptr : NULL;
riscv_aclint_mtimer_callback *cb =
g_malloc0(sizeof(riscv_aclint_mtimer_callback));
g_new0(riscv_aclint_mtimer_callback, 1);
if (!env) {
g_free(cb);
@ -393,7 +393,7 @@ static void riscv_aclint_swi_realize(DeviceState *dev, Error **errp)
TYPE_RISCV_ACLINT_SWI, RISCV_ACLINT_SWI_SIZE);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &swi->mmio);
swi->soft_irqs = g_malloc(sizeof(qemu_irq) * swi->num_harts);
swi->soft_irqs = g_new(qemu_irq, swi->num_harts);
qdev_init_gpio_out(dev, swi->soft_irqs, swi->num_harts);
/* Claim software interrupt bits */

@ -604,7 +604,7 @@ static void ics_realize(DeviceState *dev, Error **errp)
error_setg(errp, "Number of interrupts needs to be greater 0");
return;
}
ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
ics->irqs = g_new0(ICSIRQState, ics->nr_irqs);
qemu_register_reset(ics_reset_handler, ics);
}

@ -132,7 +132,7 @@ static void virt_init(MachineState *machine)
exit(1);
}
reset_info = g_malloc0(sizeof(ResetInfo));
reset_info = g_new0(ResetInfo, 1);
/* init CPUs */
cpu = M68K_CPU(cpu_create(machine->cpu_type));

@ -162,7 +162,7 @@ mips_mipssim_init(MachineState *machine)
cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
env = &cpu->env;
reset_info = g_malloc0(sizeof(ResetData));
reset_info = g_new0(ResetData, 1);
reset_info->cpu = cpu;
reset_info->vector = env->active_tc.PC;
qemu_register_reset(main_cpu_reset, reset_info);

@ -253,7 +253,7 @@ static void applesmc_add_key(AppleSMCState *s, const char *key,
{
struct AppleSMCData *def;
def = g_malloc0(sizeof(struct AppleSMCData));
def = g_new0(struct AppleSMCData, 1);
def->key = key;
def->len = len;
def->data = data;

@ -151,7 +151,7 @@ static void imx6_defer_clear_reset_bit(int cpuid,
return;
}
ri = g_malloc(sizeof(struct SRCSCRResetInfo));
ri = g_new(struct SRCSCRResetInfo, 1);
ri->s = s;
ri->reset_bit = reset_shift;

@ -411,7 +411,7 @@ static void resize_peers(IVShmemState *s, int nb_peers)
assert(nb_peers > old_nb_peers);
IVSHMEM_DPRINTF("bumping storage to %d peers\n", nb_peers);
s->peers = g_realloc(s->peers, nb_peers * sizeof(Peer));
s->peers = g_renew(Peer, s->peers, nb_peers);
s->nb_peers = nb_peers;
for (i = old_nb_peers; i < nb_peers; i++) {
@ -731,7 +731,7 @@ static void ivshmem_reset(DeviceState *d)
static int ivshmem_setup_interrupts(IVShmemState *s, Error **errp)
{
/* allocate QEMU callback data for receiving interrupts */
s->msi_vectors = g_malloc0(s->vectors * sizeof(MSIVector));
s->msi_vectors = g_new0(MSIVector, s->vectors);
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1, errp)) {

@ -1995,7 +1995,7 @@ static void virtio_net_rsc_cache_buf(VirtioNetRscChain *chain,
VirtioNetRscSeg *seg;
hdr_len = chain->n->guest_hdr_len;
seg = g_malloc(sizeof(VirtioNetRscSeg));
seg = g_new(VirtioNetRscSeg, 1);
seg->buf = g_malloc(hdr_len + sizeof(struct eth_header)
+ sizeof(struct ip6_header) + VIRTIO_NET_MAX_TCP_PAYLOAD);
memcpy(seg->buf, buf, size);
@ -3443,7 +3443,7 @@ static void virtio_net_device_realize(DeviceState *dev, Error **errp)
virtio_cleanup(vdev);
return;
}
n->vqs = g_malloc0(sizeof(VirtIONetQueue) * n->max_queue_pairs);
n->vqs = g_new0(VirtIONetQueue, n->max_queue_pairs);
n->curr_queue_pairs = 1;
n->tx_timeout = n->net_conf.txtimer;

@ -268,7 +268,7 @@ static void nvme_ns_init_zoned(NvmeNamespace *ns)
nvme_ns_zoned_init_state(ns);
id_ns_z = g_malloc0(sizeof(NvmeIdNsZoned));
id_ns_z = g_new0(NvmeIdNsZoned, 1);
/* MAR/MOR are zeroes-based, FFFFFFFFFh means no limit */
id_ns_z->mar = cpu_to_le32(ns->params.max_active_zones - 1);

@ -946,7 +946,7 @@ static AddressSpace *pnv_phb3_dma_iommu(PCIBus *bus, void *opaque, int devfn)
}
if (ds == NULL) {
ds = g_malloc0(sizeof(PnvPhb3DMASpace));
ds = g_new0(PnvPhb3DMASpace, 1);
ds->bus = bus;
ds->devfn = devfn;
ds->pe_num = PHB_INVALID_PE;

@ -1466,7 +1466,7 @@ static AddressSpace *pnv_phb4_dma_iommu(PCIBus *bus, void *opaque, int devfn)
ds = pnv_phb4_dma_find(phb, bus, devfn);
if (ds == NULL) {
ds = g_malloc0(sizeof(PnvPhb4DMASpace));
ds = g_new0(PnvPhb4DMASpace, 1);
ds->bus = bus;
ds->devfn = devfn;
ds->pe_num = PHB_INVALID_PE;

@ -177,7 +177,7 @@ static void register_vfs(PCIDevice *dev)
assert(sriov_cap > 0);
num_vfs = pci_get_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF);
dev->exp.sriov_pf.vf = g_malloc(sizeof(PCIDevice *) * num_vfs);
dev->exp.sriov_pf.vf = g_new(PCIDevice *, num_vfs);
assert(dev->exp.sriov_pf.vf);
trace_sriov_register_vfs(dev->name, PCI_SLOT(dev->devfn),

@ -899,7 +899,7 @@ void ppce500_init(MachineState *machine)
if (!i) {
/* Primary CPU */
struct boot_info *boot_info;
boot_info = g_malloc0(sizeof(struct boot_info));
boot_info = g_new0(struct boot_info, 1);
qemu_register_reset(ppce500_cpu_reset, cpu);
env->load_info = boot_info;
} else {

@ -1063,7 +1063,7 @@ clk_setup_cb cpu_ppc_tb_init (CPUPPCState *env, uint32_t freq)
PowerPCCPU *cpu = env_archcpu(env);
ppc_tb_t *tb_env;
tb_env = g_malloc0(sizeof(ppc_tb_t));
tb_env = g_new0(ppc_tb_t, 1);
env->tb_env = tb_env;
tb_env->flags = PPC_DECR_UNDERFLOW_TRIGGERED;
if (is_book3s_arch2x(env)) {
@ -1338,8 +1338,8 @@ clk_setup_cb ppc_40x_timers_init (CPUPPCState *env, uint32_t freq,
trace_ppc40x_timers_init(freq);
tb_env = g_malloc0(sizeof(ppc_tb_t));
ppc40x_timer = g_malloc0(sizeof(ppc40x_timer_t));
tb_env = g_new0(ppc_tb_t, 1);
ppc40x_timer = g_new0(ppc40x_timer_t, 1);
env->tb_env = tb_env;
tb_env->flags = PPC_DECR_UNDERFLOW_TRIGGERED;
@ -1447,7 +1447,7 @@ int ppc_dcr_init (CPUPPCState *env, int (*read_error)(int dcrn),
{
ppc_dcr_t *dcr_env;
dcr_env = g_malloc0(sizeof(ppc_dcr_t));
dcr_env = g_new0(ppc_dcr_t, 1);
dcr_env->read_error = read_error;
dcr_env->write_error = write_error;
env->dcr_env = dcr_env;

@ -130,7 +130,7 @@ static void ref405ep_fpga_init(MemoryRegion *sysmem, uint32_t base)
ref405ep_fpga_t *fpga;
MemoryRegion *fpga_memory = g_new(MemoryRegion, 1);
fpga = g_malloc0(sizeof(ref405ep_fpga_t));
fpga = g_new0(ref405ep_fpga_t, 1);
memory_region_init_io(fpga_memory, NULL, &ref405ep_fpga_ops, fpga,
"fpga", 0x00000100);
memory_region_add_subregion(sysmem, base, fpga_memory);
@ -431,7 +431,7 @@ static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base)
taihu_cpld_t *cpld;
MemoryRegion *cpld_memory = g_new(MemoryRegion, 1);
cpld = g_malloc0(sizeof(taihu_cpld_t));
cpld = g_new0(taihu_cpld_t, 1);
memory_region_init_io(cpld_memory, NULL, &taihu_cpld_ops, cpld, "cpld", 0x100);
memory_region_add_subregion(sysmem, base, cpld_memory);
qemu_register_reset(&taihu_cpld_reset, cpld);

@ -215,7 +215,7 @@ void ppc4xx_plb_init(CPUPPCState *env)
{
ppc4xx_plb_t *plb;
plb = g_malloc0(sizeof(ppc4xx_plb_t));
plb = g_new0(ppc4xx_plb_t, 1);
ppc_dcr_register(env, PLB3A0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
ppc_dcr_register(env, PLB4A0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
ppc_dcr_register(env, PLB0_ACR, plb, &dcr_read_plb, &dcr_write_plb);
@ -300,7 +300,7 @@ static void ppc4xx_pob_init(CPUPPCState *env)
{
ppc4xx_pob_t *pob;
pob = g_malloc0(sizeof(ppc4xx_pob_t));
pob = g_new0(ppc4xx_pob_t, 1);
ppc_dcr_register(env, POB0_BEAR, pob, &dcr_read_pob, &dcr_write_pob);
ppc_dcr_register(env, POB0_BESR0, pob, &dcr_read_pob, &dcr_write_pob);
ppc_dcr_register(env, POB0_BESR1, pob, &dcr_read_pob, &dcr_write_pob);
@ -380,7 +380,7 @@ static void ppc4xx_opba_init(hwaddr base)
trace_opba_init(base);
opba = g_malloc0(sizeof(ppc4xx_opba_t));
opba = g_new0(ppc4xx_opba_t, 1);
memory_region_init_io(&opba->io, NULL, &opba_ops, opba, "opba", 0x002);
memory_region_add_subregion(get_system_memory(), base, &opba->io);
qemu_register_reset(ppc4xx_opba_reset, opba);
@ -575,7 +575,7 @@ void ppc405_ebc_init(CPUPPCState *env)
{
ppc4xx_ebc_t *ebc;
ebc = g_malloc0(sizeof(ppc4xx_ebc_t));
ebc = g_new0(ppc4xx_ebc_t, 1);
qemu_register_reset(&ebc_reset, ebc);
ppc_dcr_register(env, EBC0_CFGADDR,
ebc, &dcr_read_ebc, &dcr_write_ebc);
@ -658,7 +658,7 @@ static void ppc405_dma_init(CPUPPCState *env, qemu_irq irqs[4])
{
ppc405_dma_t *dma;
dma = g_malloc0(sizeof(ppc405_dma_t));
dma = g_new0(ppc405_dma_t, 1);
memcpy(dma->irqs, irqs, 4 * sizeof(qemu_irq));
qemu_register_reset(&ppc405_dma_reset, dma);
ppc_dcr_register(env, DMA0_CR0,
@ -757,7 +757,7 @@ static void ppc405_gpio_init(hwaddr base)
trace_ppc405_gpio_init(base);
gpio = g_malloc0(sizeof(ppc405_gpio_t));
gpio = g_new0(ppc405_gpio_t, 1);
memory_region_init_io(&gpio->io, NULL, &ppc405_gpio_ops, gpio, "pgio", 0x038);
memory_region_add_subregion(get_system_memory(), base, &gpio->io);
qemu_register_reset(&ppc405_gpio_reset, gpio);
@ -906,7 +906,7 @@ static void ppc405_ocm_init(CPUPPCState *env)
{
ppc405_ocm_t *ocm;
ocm = g_malloc0(sizeof(ppc405_ocm_t));
ocm = g_new0(ppc405_ocm_t, 1);
/* XXX: Size is 4096 or 0x04000000 */
memory_region_init_ram(&ocm->isarc_ram, NULL, "ppc405.ocm", 4 * KiB,
&error_fatal);
@ -1148,7 +1148,7 @@ static void ppc4xx_gpt_init(hwaddr base, qemu_irq irqs[5])
trace_ppc4xx_gpt_init(base);
gpt = g_malloc0(sizeof(ppc4xx_gpt_t));
gpt = g_new0(ppc4xx_gpt_t, 1);
for (i = 0; i < 5; i++) {
gpt->irqs[i] = irqs[i];
}
@ -1399,7 +1399,7 @@ static void ppc405ep_cpc_init (CPUPPCState *env, clk_setup_t clk_setup[8],
{
ppc405ep_cpc_t *cpc;
cpc = g_malloc0(sizeof(ppc405ep_cpc_t));
cpc = g_new0(ppc405ep_cpc_t, 1);
memcpy(cpc->clk_setup, clk_setup,
PPC405EP_CLK_NB * sizeof(clk_setup_t));
cpc->jtagid = 0x20267049;

@ -389,7 +389,7 @@ void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks,
{
ppc4xx_sdram_t *sdram;
sdram = g_malloc0(sizeof(ppc4xx_sdram_t));
sdram = g_new0(ppc4xx_sdram_t, 1);
sdram->irq = irq;
sdram->nbanks = nbanks;
sdram->ram_memories = ram_memories;

@ -337,8 +337,8 @@ void ppc_booke_timers_init(PowerPCCPU *cpu, uint32_t freq, uint32_t flags)
booke_timer_t *booke_timer;
int ret = 0;
tb_env = g_malloc0(sizeof(ppc_tb_t));
booke_timer = g_malloc0(sizeof(booke_timer_t));
tb_env = g_new0(ppc_tb_t, 1);
booke_timer = g_new0(booke_timer_t, 1);
cpu->env.tb_env = tb_env;
tb_env->flags = flags | PPC_TIMER_BOOKE | PPC_DECR_ZERO_TRIGGERED;

@ -3601,7 +3601,7 @@ static SpaprDimmState *spapr_pending_dimm_unplugs_add(SpaprMachineState *spapr,
*/
ds = spapr_pending_dimm_unplugs_find(spapr, dimm);
if (!ds) {
ds = g_malloc0(sizeof(SpaprDimmState));
ds = g_new0(SpaprDimmState, 1);
ds->nr_lmbs = nr_lmbs;
ds->dimm = dimm;
QTAILQ_INSERT_HEAD(&spapr->pending_dimm_unplugs, ds, next);

@ -594,7 +594,7 @@ static void spapr_hotplug_req_event(uint8_t hp_id, uint8_t hp_action,
struct rtas_event_log_v6_hp *hp;
entry = g_new(SpaprEventLogEntry, 1);
new_hp = g_malloc0(sizeof(struct hp_extended_log));
new_hp = g_new0(struct hp_extended_log, 1);
entry->extended_log = new_hp;
v6hdr = &new_hp->v6hdr;

@ -1596,7 +1596,7 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu,
return H_PARAMETER;
}
spapr_cpu->nested_host_state = g_try_malloc(sizeof(CPUPPCState));
spapr_cpu->nested_host_state = g_try_new(CPUPPCState, 1);
if (!spapr_cpu->nested_host_state) {
return H_NO_MEM;
}

@ -436,8 +436,7 @@ int spapr_numa_write_assoc_lookup_arrays(SpaprMachineState *spapr, void *fdt,
int i;
/* ibm,associativity-lookup-arrays */
int_buf = g_malloc0((nr_nodes * max_distance_ref_points + 2) *
sizeof(uint32_t));
int_buf = g_new0(uint32_t, nr_nodes * max_distance_ref_points + 2);
cur_index = int_buf;
int_buf[0] = cpu_to_be32(nr_nodes);
/* Number of entries per associativity list */

@ -41,7 +41,7 @@ int pvrdma_ring_init(PvrdmaRing *ring, const char *name, PCIDevice *dev,
qatomic_set(&ring->ring_state->cons_head, 0);
*/
ring->npages = npages;
ring->pages = g_malloc0(npages * sizeof(void *));
ring->pages = g_new0(void *, npages);
for (i = 0; i < npages; i++) {
if (!tbl[i]) {

@ -154,7 +154,7 @@ void pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle)
CompHandlerCtx *comp_ctx;
/* Prepare CQE */
comp_ctx = g_malloc(sizeof(CompHandlerCtx));
comp_ctx = g_new(CompHandlerCtx, 1);
comp_ctx->dev = dev;