tcg/loongarch64: Lower vector min max ops
Lower the following ops: - smin_vec - smax_vec - umin_vec - umax_vec Signed-off-by: Jiajie Chen <c@jia.je> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230908022302.180442-10-c@jia.je> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
76d20c205d
commit
b2f84adc00
@ -1701,6 +1701,18 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
|
||||
static const LoongArchInsn mul_vec_insn[4] = {
|
||||
OPC_VMUL_B, OPC_VMUL_H, OPC_VMUL_W, OPC_VMUL_D
|
||||
};
|
||||
static const LoongArchInsn smin_vec_insn[4] = {
|
||||
OPC_VMIN_B, OPC_VMIN_H, OPC_VMIN_W, OPC_VMIN_D
|
||||
};
|
||||
static const LoongArchInsn umin_vec_insn[4] = {
|
||||
OPC_VMIN_BU, OPC_VMIN_HU, OPC_VMIN_WU, OPC_VMIN_DU
|
||||
};
|
||||
static const LoongArchInsn smax_vec_insn[4] = {
|
||||
OPC_VMAX_B, OPC_VMAX_H, OPC_VMAX_W, OPC_VMAX_D
|
||||
};
|
||||
static const LoongArchInsn umax_vec_insn[4] = {
|
||||
OPC_VMAX_BU, OPC_VMAX_HU, OPC_VMAX_WU, OPC_VMAX_DU
|
||||
};
|
||||
|
||||
a0 = args[0];
|
||||
a1 = args[1];
|
||||
@ -1805,6 +1817,18 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
|
||||
case INDEX_op_mul_vec:
|
||||
tcg_out32(s, encode_vdvjvk_insn(mul_vec_insn[vece], a0, a1, a2));
|
||||
break;
|
||||
case INDEX_op_smin_vec:
|
||||
tcg_out32(s, encode_vdvjvk_insn(smin_vec_insn[vece], a0, a1, a2));
|
||||
break;
|
||||
case INDEX_op_smax_vec:
|
||||
tcg_out32(s, encode_vdvjvk_insn(smax_vec_insn[vece], a0, a1, a2));
|
||||
break;
|
||||
case INDEX_op_umin_vec:
|
||||
tcg_out32(s, encode_vdvjvk_insn(umin_vec_insn[vece], a0, a1, a2));
|
||||
break;
|
||||
case INDEX_op_umax_vec:
|
||||
tcg_out32(s, encode_vdvjvk_insn(umax_vec_insn[vece], a0, a1, a2));
|
||||
break;
|
||||
case INDEX_op_dupm_vec:
|
||||
tcg_out_dupm_vec(s, type, vece, a0, a1, a2);
|
||||
break;
|
||||
@ -1832,6 +1856,10 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
|
||||
case INDEX_op_not_vec:
|
||||
case INDEX_op_neg_vec:
|
||||
case INDEX_op_mul_vec:
|
||||
case INDEX_op_smin_vec:
|
||||
case INDEX_op_smax_vec:
|
||||
case INDEX_op_umin_vec:
|
||||
case INDEX_op_umax_vec:
|
||||
return 1;
|
||||
default:
|
||||
return 0;
|
||||
@ -2007,6 +2035,10 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
|
||||
case INDEX_op_xor_vec:
|
||||
case INDEX_op_nor_vec:
|
||||
case INDEX_op_mul_vec:
|
||||
case INDEX_op_smin_vec:
|
||||
case INDEX_op_smax_vec:
|
||||
case INDEX_op_umin_vec:
|
||||
case INDEX_op_umax_vec:
|
||||
return C_O1_I2(w, w, w);
|
||||
|
||||
case INDEX_op_not_vec:
|
||||
|
@ -193,7 +193,7 @@ extern bool use_lsx_instructions;
|
||||
#define TCG_TARGET_HAS_rots_vec 0
|
||||
#define TCG_TARGET_HAS_rotv_vec 0
|
||||
#define TCG_TARGET_HAS_sat_vec 0
|
||||
#define TCG_TARGET_HAS_minmax_vec 0
|
||||
#define TCG_TARGET_HAS_minmax_vec 1
|
||||
#define TCG_TARGET_HAS_bitsel_vec 0
|
||||
#define TCG_TARGET_HAS_cmpsel_vec 0
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user