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target/m68k: Avoid tcg_const_i32 when modified 

In several instances, a temp is initialized with a
for use as a constant, and then subsequently used
as an unrelated temp.  Split them.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-25 15:05:31 -10:00
parent 3df11bb14a
commit b32a07d42d
1 changed files with 16 additions and 13 deletions
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29
target/m68k/translate.c
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@ -1631,8 +1631,8 @@ static void bcd_add(TCGv dest, TCGv src)
* = result with some possible exceeding 0x6
*/
t0 = tcg_const_i32(0x066);
tcg_gen_add_i32(t0, t0, src);
t0 = tcg_temp_new();
tcg_gen_addi_i32(t0, src, 0x066);
t1 = tcg_temp_new();
tcg_gen_add_i32(t1, t0, dest);
@ -1818,7 +1818,8 @@ DISAS_INSN(nbcd)
SRC_EA(env, src, OS_BYTE, 0, &addr);
dest = tcg_const_i32(0);
dest = tcg_temp_new();
tcg_gen_movi_i32(dest, 0);
bcd_sub(dest, src);
DEST_EA(env, insn, OS_BYTE, dest, &addr);
@ -1896,8 +1897,8 @@ DISAS_INSN(bitop_reg)
else
tcg_gen_andi_i32(src2, DREG(insn, 9), 31);
tmp = tcg_const_i32(1);
tcg_gen_shl_i32(tmp, tmp, src2);
tmp = tcg_temp_new();
tcg_gen_shl_i32(tmp, tcg_constant_i32(1), src2);
tcg_gen_and_i32(QREG_CC_Z, src1, tmp);
@ -3076,7 +3077,7 @@ DISAS_INSN(suba)
static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize)
{
TCGv tmp;
TCGv tmp, zero;
gen_flush_flags(s); /* compute old Z */
@ -3085,14 +3086,15 @@ static inline void gen_subx(DisasContext *s, TCGv src, TCGv dest, int opsize)
* (X, N) = dest - (src + X);
*/
tmp = tcg_const_i32(0);
tcg_gen_add2_i32(QREG_CC_N, QREG_CC_X, src, tmp, QREG_CC_X, tmp);
tcg_gen_sub2_i32(QREG_CC_N, QREG_CC_X, dest, tmp, QREG_CC_N, QREG_CC_X);
zero = tcg_constant_i32(0);
tcg_gen_add2_i32(QREG_CC_N, QREG_CC_X, src, zero, QREG_CC_X, zero);
tcg_gen_sub2_i32(QREG_CC_N, QREG_CC_X, dest, zero, QREG_CC_N, QREG_CC_X);
gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1);
tcg_gen_andi_i32(QREG_CC_X, QREG_CC_X, 1);
/* Compute signed-overflow for subtract. */
tmp = tcg_temp_new();
tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, dest);
tcg_gen_xor_i32(tmp, dest, src);
tcg_gen_and_i32(QREG_CC_V, QREG_CC_V, tmp);
@ -3279,7 +3281,7 @@ DISAS_INSN(adda)
static inline void gen_addx(DisasContext *s, TCGv src, TCGv dest, int opsize)
{
TCGv tmp;
TCGv tmp, zero;
gen_flush_flags(s); /* compute old Z */
@ -3288,13 +3290,14 @@ static inline void gen_addx(DisasContext *s, TCGv src, TCGv dest, int opsize)
* (X, N) = src + dest + X;
*/
tmp = tcg_const_i32(0);
tcg_gen_add2_i32(QREG_CC_N, QREG_CC_X, QREG_CC_X, tmp, dest, tmp);
tcg_gen_add2_i32(QREG_CC_N, QREG_CC_X, QREG_CC_N, QREG_CC_X, src, tmp);
zero = tcg_constant_i32(0);
tcg_gen_add2_i32(QREG_CC_N, QREG_CC_X, QREG_CC_X, zero, dest, zero);
tcg_gen_add2_i32(QREG_CC_N, QREG_CC_X, QREG_CC_N, QREG_CC_X, src, zero);
gen_ext(QREG_CC_N, QREG_CC_N, opsize, 1);
/* Compute signed-overflow for addition. */
tmp = tcg_temp_new();
tcg_gen_xor_i32(QREG_CC_V, QREG_CC_N, src);
tcg_gen_xor_i32(tmp, dest, src);
tcg_gen_andc_i32(QREG_CC_V, QREG_CC_V, tmp);