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hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset 

Move the NVIC specific bits of reset to the NVIC's own
reset function, rather than using ifdefs in the common
arm_gic reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2012-05-02 16:49:39 +00:00
parent c48c6522f5
commit b3387ede2f
2 changed files with 7 additions and 10 deletions
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10
hw/arm_gic.c
View File

@ -743,23 +743,13 @@ static void gic_reset(DeviceState *dev)
s->current_pending[i] = 1023;
s->running_irq[i] = 1023;
s->running_priority[i] = 0x100;
#ifdef NVIC
/* The NVIC doesn't have per-cpu interfaces, so enable by default. */
s->cpu_enabled[i] = 1;
#else
s->cpu_enabled[i] = 0;
#endif
}
for (i = 0; i < 16; i++) {
GIC_SET_ENABLED(i, ALL_CPU_MASK);
GIC_SET_TRIGGER(i);
}
#ifdef NVIC
/* The NVIC is always enabled. */
s->enabled = 1;
#else
s->enabled = 0;
#endif
}
static void gic_save(QEMUFile *f, void *opaque)

7
hw/armv7m_nvic.c
View File

@ -382,6 +382,13 @@ static void armv7m_nvic_reset(DeviceState *dev)
{
nvic_state *s = FROM_SYSBUSGIC(nvic_state, sysbus_from_qdev(dev));
gic_reset(&s->gic.busdev.qdev);
/* Common GIC reset resets to disabled; the NVIC doesn't have
* per-CPU interfaces so mark our non-existent CPU interface
* as enabled by default.
*/
s->gic.cpu_enabled[0] = 1;
/* The NVIC as a whole is always enabled. */
s->gic.enabled = 1;
systick_reset(s);
}