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target/ppc: move power-saving interrupt masking out of cpu_has_work_POWER7 

Move the interrupt masking logic out of cpu_has_work_POWER7 in a new
method, p7_interrupt_powersave, that only returns an interrupt if it can
wake the processor from power-saving mode.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20221011204829.1641124-25-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Matheus Ferst 2022-10-11 17:48:24 -03:00 committed by Daniel Henrique Barboza
parent 3f34e809ac
commit b34d358a21
1 changed files with 25 additions and 20 deletions
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45
target/ppc/cpu_init.c
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@ -5960,6 +5960,30 @@ static bool ppc_pvr_match_power7(PowerPCCPUClass *pcc, uint32_t pvr, bool best)
return true; return true;
} }
static int p7_interrupt_powersave(CPUPPCState *env)
{
if ((env->pending_interrupts & PPC_INTERRUPT_EXT) &&
(env->spr[SPR_LPCR] & LPCR_P7_PECE0)) {
return PPC_INTERRUPT_EXT;
}
if ((env->pending_interrupts & PPC_INTERRUPT_DECR) &&
(env->spr[SPR_LPCR] & LPCR_P7_PECE1)) {
return PPC_INTERRUPT_DECR;
}
if ((env->pending_interrupts & PPC_INTERRUPT_MCK) &&
(env->spr[SPR_LPCR] & LPCR_P7_PECE2)) {
return PPC_INTERRUPT_MCK;
}
if ((env->pending_interrupts & PPC_INTERRUPT_HMI) &&
(env->spr[SPR_LPCR] & LPCR_P7_PECE2)) {
return PPC_INTERRUPT_HMI;
}
if (env->pending_interrupts & PPC_INTERRUPT_RESET) {
return PPC_INTERRUPT_RESET;
}
return 0;
}
static bool cpu_has_work_POWER7(CPUState *cs) static bool cpu_has_work_POWER7(CPUState *cs)
{ {
PowerPCCPU *cpu = POWERPC_CPU(cs); PowerPCCPU *cpu = POWERPC_CPU(cs);
@ -5969,26 +5993,7 @@ static bool cpu_has_work_POWER7(CPUState *cs)
if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
return false; return false;
} }
if ((env->pending_interrupts & PPC_INTERRUPT_EXT) && return p7_interrupt_powersave(env) != 0;
(env->spr[SPR_LPCR] & LPCR_P7_PECE0)) {
return true;
}
if ((env->pending_interrupts & PPC_INTERRUPT_DECR) &&
(env->spr[SPR_LPCR] & LPCR_P7_PECE1)) {
return true;
}
if ((env->pending_interrupts & PPC_INTERRUPT_MCK) &&
(env->spr[SPR_LPCR] & LPCR_P7_PECE2)) {
return true;
}
if ((env->pending_interrupts & PPC_INTERRUPT_HMI) &&
(env->spr[SPR_LPCR] & LPCR_P7_PECE2)) {
return true;
}
if (env->pending_interrupts & PPC_INTERRUPT_RESET) {
return true;
}
return false;
} else { } else {
return FIELD_EX64(env->msr, MSR, EE) && return FIELD_EX64(env->msr, MSR, EE) &&
(cs->interrupt_request & CPU_INTERRUPT_HARD); (cs->interrupt_request & CPU_INTERRUPT_HARD);