target-i386: add VME to all CPUs
vm86 mode extensions date back to the 486. All models should have them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -305,6 +305,20 @@ static void pc_init_pci(MachineState *machine)
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static void pc_compat_2_2(MachineState *machine)
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{
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x86_cpu_compat_set_features("kvm64", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("kvm32", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Conroe", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Penryn", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Nehalem", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Westmere", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("SandyBridge", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Haswell", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G1", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G2", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G3", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G4", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G5", FEAT_1_EDX, 0, CPUID_VME);
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}
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static void pc_compat_2_1(MachineState *machine)
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@ -284,6 +284,20 @@ static void pc_q35_init(MachineState *machine)
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static void pc_compat_2_2(MachineState *machine)
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{
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x86_cpu_compat_set_features("kvm64", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("kvm32", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Conroe", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Penryn", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Nehalem", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Westmere", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("SandyBridge", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Haswell", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G1", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G2", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G3", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G4", FEAT_1_EDX, 0, CPUID_VME);
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x86_cpu_compat_set_features("Opteron_G5", FEAT_1_EDX, 0, CPUID_VME);
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}
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static void pc_compat_2_1(MachineState *machine)
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@ -760,9 +760,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.family = 15,
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.model = 6,
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.stepping = 1,
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/* Missing: CPUID_VME, CPUID_HT */
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/* Missing: CPUID_HT */
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.features[FEAT_1_EDX] =
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PPRO_FEATURES |
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PPRO_FEATURES | CPUID_VME |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
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CPUID_PSE36,
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/* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
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@ -802,7 +802,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 6,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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PPRO_FEATURES |
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PPRO_FEATURES | CPUID_VME |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
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.features[FEAT_1_ECX] =
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CPUID_EXT_SSE3,
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@ -928,7 +928,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 15,
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.stepping = 3,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -950,7 +950,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 23,
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.stepping = 3,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -973,7 +973,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 26,
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.stepping = 3,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -996,7 +996,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 44,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1020,7 +1020,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 42,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1049,7 +1049,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 60,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1084,7 +1084,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 61,
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.stepping = 2,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1120,7 +1120,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 6,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1145,7 +1145,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 6,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1173,7 +1173,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 6,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1203,7 +1203,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 1,
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.stepping = 2,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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@ -1238,7 +1238,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.model = 2,
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.stepping = 0,
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.features[FEAT_1_EDX] =
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CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
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CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
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CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
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CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
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