hw/pl061.c: Support GPIOAMSEL register
Support the GPIOAMSEL register found on some Stellaris boards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -50,6 +50,7 @@ typedef struct {
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uint32_t den;
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uint32_t cr;
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uint32_t float_high;
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uint32_t amsel;
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qemu_irq irq;
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qemu_irq out[8];
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const unsigned char *id;
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@ -57,7 +58,7 @@ typedef struct {
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static const VMStateDescription vmstate_pl061 = {
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.name = "pl061",
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.version_id = 1,
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.version_id = 2,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(locked, pl061_state),
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@ -80,6 +81,7 @@ static const VMStateDescription vmstate_pl061 = {
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VMSTATE_UINT32(den, pl061_state),
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VMSTATE_UINT32(cr, pl061_state),
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VMSTATE_UINT32(float_high, pl061_state),
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VMSTATE_UINT32_V(amsel, pl061_state, 2),
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VMSTATE_END_OF_LIST()
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}
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};
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@ -157,6 +159,8 @@ static uint32_t pl061_read(void *opaque, target_phys_addr_t offset)
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return s->locked;
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case 0x524: /* Commit */
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return s->cr;
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case 0x528: /* Analog mode select */
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return s->amsel;
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default:
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hw_error("pl061_read: Bad offset %x\n", (int)offset);
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return 0;
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@ -229,6 +233,9 @@ static void pl061_write(void *opaque, target_phys_addr_t offset,
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if (!s->locked)
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s->cr = value & 0xff;
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break;
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case 0x528:
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s->amsel = value & 0xff;
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break;
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default:
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hw_error("pl061_write: Bad offset %x\n", (int)offset);
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}
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