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virtio: fix for rc2 

It turns out there's a way to setup SHPC on Q35: just put
 a PCI to PCI bridge behind a DMI to PCI one. Our _OSC is
 thus incorrect.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio: fix for rc2

It turns out there's a way to setup SHPC on Q35: just put
a PCI to PCI bridge behind a DMI to PCI one. Our _OSC is
thus incorrect.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Mon 07 Aug 2017 22:39:20 BST
# gpg:                using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream:
  cpu: add APIs to allocate/free CPU environment
  hw/i386: allow SHPC for Q35 machine

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2017-08-08 10:01:49 +01:00
parent f22ab6cb0c e2a7f28693
commit b4174c4b08
3 changed files with 67 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hw/i386/acpi-build.c
View File

@ -1862,9 +1862,9 @@ static Aml *build_q35_osc_method(void)
/*
* Always allow native PME, AER (no dependencies)
* Never allow SHPC (no SHPC controller in this system)
* Allow SHPC (PCI bridges can have SHPC controller)
*/
aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1D), a_ctrl));
aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
/* Unknown revision */

31
include/qom/cpu.h
View File

@ -162,6 +162,10 @@ typedef struct CPUClass {
void (*dump_statistics)(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags);
int64_t (*get_arch_id)(CPUState *cpu);
void * (*alloc_env)(CPUState *cpu);
void (*get_env)(CPUState *cpu, void *env);
void (*set_env)(CPUState *cpu, void *env);
void (*free_env)(CPUState *cpu, void *env);
bool (*get_paging_enabled)(const CPUState *cpu);
void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
Error **errp);
@ -439,6 +443,33 @@ static inline void cpu_tb_jmp_cache_clear(CPUState *cpu)
extern bool mttcg_enabled;
#define qemu_tcg_mttcg_enabled() (mttcg_enabled)
/**
* cpu_alloc_env: allocate CPU environment structure
* @cpu: allocate environment structure for this CPU
*/
void *cpu_alloc_env(CPUState *cpu);
/**
* cpu_get_env: retrieve CPU environment structure
* @cpu: CPU to use
* @env: environment structure to use
*/
void cpu_get_env(CPUState *cpu, void *env);
/**
* cpu_set_env: switch to given CPU environment
* @cpu: CPU to use
* @env: environment structure to use
*/
void cpu_set_env(CPUState *cpu, void *env);
/**
* cpu_free_env: free CPU environment structure
* @cpu: free environment structure for this CPU
* @env: structure to free
*/
void cpu_free_env(CPUState *cpu, void *env);
/**
* cpu_paging_enabled:
* @cpu: The CPU whose state is to be inspected.

34
qom/cpu.c
View File

@ -89,6 +89,40 @@ out:
return cpu;
}
void *cpu_alloc_env(CPUState *cpu)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
return cc->alloc_env ? cc->alloc_env(cpu) : NULL;
}
void cpu_get_env(CPUState *cpu, void *env)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
if (cc->get_env) {
cc->get_env(cpu, env);
}
}
void cpu_set_env(CPUState *cpu, void *env)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
if (cc->set_env) {
cc->set_env(cpu, env);
}
}
void cpu_free_env(CPUState *cpu, void *env)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
if (cc->free_env) {
cc->free_env(cpu, env);
}
}
bool cpu_paging_enabled(const CPUState *cpu)
{
CPUClass *cc = CPU_GET_CLASS(cpu);