s390x/css: sense data endianness
We keep the device's sense data in a byte array (following the architecture), but the ecws are an array of 32 bit values. If we just blindly copy the values, the sense data will change from de-facto BE data to de-facto cpu-endian data, which means we end up doing an incorrect conversion on LE hosts. Let's just explicitly convert to cpu-endianness while assembling the irb. Reported-by: Andy Lutomirski <luto@kernel.org> Tested-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
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@ -892,8 +892,14 @@ int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
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/* If a unit check is pending, copy sense data. */
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/* If a unit check is pending, copy sense data. */
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if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
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if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) &&
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(p->chars & PMCW_CHARS_MASK_CSENSE)) {
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(p->chars & PMCW_CHARS_MASK_CSENSE)) {
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int i;
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irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
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irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
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/* Attention: sense_data is already BE! */
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memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
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memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
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for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
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irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
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}
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irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
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irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
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}
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}
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}
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}
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