accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h
The previous placement in tcg/tcg.h was not logical. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
f83bcecb1f
commit
b4c8f3d4dd
@ -63,6 +63,7 @@
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#define CPU_LDST_H
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#include "exec/memopidx.h"
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#include "qemu/int128.h"
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#if defined(CONFIG_USER_ONLY)
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/* sparc32plus has 64bit long but 32bit space address
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@ -233,6 +234,92 @@ void cpu_stl_le_mmu(CPUArchState *env, abi_ptr ptr, uint32_t val,
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void cpu_stq_le_mmu(CPUArchState *env, abi_ptr ptr, uint64_t val,
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MemOpIdx oi, uintptr_t ra);
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uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, target_ulong addr,
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uint64_t cmpv, uint64_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, target_ulong addr,
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uint64_t cmpv, uint64_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \
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TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \
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(CPUArchState *env, target_ulong addr, TYPE val, \
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MemOpIdx oi, uintptr_t retaddr);
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#ifdef CONFIG_ATOMIC64
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#define GEN_ATOMIC_HELPER_ALL(NAME) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \
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GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \
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GEN_ATOMIC_HELPER(NAME, uint64_t, q_be)
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#else
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#define GEN_ATOMIC_HELPER_ALL(NAME) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_be)
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#endif
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GEN_ATOMIC_HELPER_ALL(fetch_add)
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GEN_ATOMIC_HELPER_ALL(fetch_sub)
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GEN_ATOMIC_HELPER_ALL(fetch_and)
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GEN_ATOMIC_HELPER_ALL(fetch_or)
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GEN_ATOMIC_HELPER_ALL(fetch_xor)
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GEN_ATOMIC_HELPER_ALL(fetch_smin)
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GEN_ATOMIC_HELPER_ALL(fetch_umin)
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GEN_ATOMIC_HELPER_ALL(fetch_smax)
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GEN_ATOMIC_HELPER_ALL(fetch_umax)
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GEN_ATOMIC_HELPER_ALL(add_fetch)
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GEN_ATOMIC_HELPER_ALL(sub_fetch)
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GEN_ATOMIC_HELPER_ALL(and_fetch)
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GEN_ATOMIC_HELPER_ALL(or_fetch)
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GEN_ATOMIC_HELPER_ALL(xor_fetch)
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GEN_ATOMIC_HELPER_ALL(smin_fetch)
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GEN_ATOMIC_HELPER_ALL(umin_fetch)
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GEN_ATOMIC_HELPER_ALL(smax_fetch)
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GEN_ATOMIC_HELPER_ALL(umax_fetch)
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GEN_ATOMIC_HELPER_ALL(xchg)
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#undef GEN_ATOMIC_HELPER_ALL
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#undef GEN_ATOMIC_HELPER
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Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, target_ulong addr,
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Int128 cmpv, Int128 newv,
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MemOpIdx oi, uintptr_t retaddr);
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Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, target_ulong addr,
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Int128 cmpv, Int128 newv,
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MemOpIdx oi, uintptr_t retaddr);
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Int128 cpu_atomic_ldo_le_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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Int128 cpu_atomic_ldo_be_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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void cpu_atomic_sto_le_mmu(CPUArchState *env, target_ulong addr, Int128 val,
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MemOpIdx oi, uintptr_t retaddr);
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void cpu_atomic_sto_be_mmu(CPUArchState *env, target_ulong addr, Int128 val,
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MemOpIdx oi, uintptr_t retaddr);
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#if defined(CONFIG_USER_ONLY)
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extern __thread uintptr_t helper_retaddr;
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@ -33,7 +33,6 @@
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#include "qemu/queue.h"
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#include "tcg/tcg-mo.h"
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#include "tcg-target.h"
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#include "qemu/int128.h"
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#include "tcg/tcg-cond.h"
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/* XXX: make safe guess about sizes */
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@ -1312,92 +1311,6 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
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#endif
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#endif /* CONFIG_SOFTMMU */
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uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, target_ulong addr,
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uint64_t cmpv, uint64_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, target_ulong addr,
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uint32_t cmpv, uint32_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, target_ulong addr,
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uint64_t cmpv, uint64_t newv,
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MemOpIdx oi, uintptr_t retaddr);
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#define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \
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TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \
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(CPUArchState *env, target_ulong addr, TYPE val, \
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MemOpIdx oi, uintptr_t retaddr);
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#ifdef CONFIG_ATOMIC64
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#define GEN_ATOMIC_HELPER_ALL(NAME) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \
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GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \
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GEN_ATOMIC_HELPER(NAME, uint64_t, q_be)
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#else
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#define GEN_ATOMIC_HELPER_ALL(NAME) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
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GEN_ATOMIC_HELPER(NAME, uint32_t, l_be)
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#endif
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GEN_ATOMIC_HELPER_ALL(fetch_add)
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GEN_ATOMIC_HELPER_ALL(fetch_sub)
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GEN_ATOMIC_HELPER_ALL(fetch_and)
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GEN_ATOMIC_HELPER_ALL(fetch_or)
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GEN_ATOMIC_HELPER_ALL(fetch_xor)
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GEN_ATOMIC_HELPER_ALL(fetch_smin)
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GEN_ATOMIC_HELPER_ALL(fetch_umin)
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GEN_ATOMIC_HELPER_ALL(fetch_smax)
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GEN_ATOMIC_HELPER_ALL(fetch_umax)
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GEN_ATOMIC_HELPER_ALL(add_fetch)
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GEN_ATOMIC_HELPER_ALL(sub_fetch)
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GEN_ATOMIC_HELPER_ALL(and_fetch)
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GEN_ATOMIC_HELPER_ALL(or_fetch)
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GEN_ATOMIC_HELPER_ALL(xor_fetch)
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GEN_ATOMIC_HELPER_ALL(smin_fetch)
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GEN_ATOMIC_HELPER_ALL(umin_fetch)
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GEN_ATOMIC_HELPER_ALL(smax_fetch)
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GEN_ATOMIC_HELPER_ALL(umax_fetch)
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GEN_ATOMIC_HELPER_ALL(xchg)
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#undef GEN_ATOMIC_HELPER_ALL
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#undef GEN_ATOMIC_HELPER
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Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, target_ulong addr,
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Int128 cmpv, Int128 newv,
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MemOpIdx oi, uintptr_t retaddr);
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Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, target_ulong addr,
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Int128 cmpv, Int128 newv,
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MemOpIdx oi, uintptr_t retaddr);
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Int128 cpu_atomic_ldo_le_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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Int128 cpu_atomic_ldo_be_mmu(CPUArchState *env, target_ulong addr,
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MemOpIdx oi, uintptr_t retaddr);
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void cpu_atomic_sto_le_mmu(CPUArchState *env, target_ulong addr, Int128 val,
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MemOpIdx oi, uintptr_t retaddr);
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void cpu_atomic_sto_be_mmu(CPUArchState *env, target_ulong addr, Int128 val,
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MemOpIdx oi, uintptr_t retaddr);
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#ifdef CONFIG_DEBUG_TCG
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void tcg_assert_listed_vecop(TCGOpcode);
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#else
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@ -32,7 +32,6 @@
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#include "exec/cpu_ldst.h"
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#include "qemu/int128.h"
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#include "qemu/atomic128.h"
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#include "tcg/tcg.h"
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#include "fpu/softfloat.h"
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#include <zlib.h> /* For crc32 */
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@ -22,7 +22,6 @@
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#include "semihosting/semihost.h"
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#include "tcg/tcg.h"
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#if !defined(CONFIG_USER_ONLY)
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@ -25,7 +25,6 @@
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#include "exec/helper-proto.h"
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#include "helper_regs.h"
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#include "exec/cpu_ldst.h"
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#include "tcg/tcg.h"
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#include "internal.h"
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#include "qemu/atomic128.h"
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@ -27,7 +27,6 @@
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#include "exec/cpu_ldst.h"
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#include "qemu/int128.h"
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#include "qemu/atomic128.h"
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#include "tcg/tcg.h"
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#include "trace.h"
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#if !defined(CONFIG_USER_ONLY)
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