Two small additional fixes for the Ibex PLIC.

-----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAl+vbrYACgkQIeENKd+X
 cFSYywf/XQ887eN5JxlGirfREh1ffMGPuDfB3eJ9bxWmVwgV+3lPaWrj6gJzTyXm
 RG/RJzBNlrVjz/JEZNJTo7ifxiEKbLfM+227ktKSyj1EZ+J5thwm+SE0XJZ0ZOiq
 9KHl8K5J6e+64K4scjgRfzEPOCdHrADUWqq2x5NncKXrNDKEtzKpM91e0FPiIMeQ
 5ZNeiIaardBRUAELD4AWRMphRSlZZbH/olwZKUHibzbvh7vRi0Ek4Kw4KS8UqzB0
 Vsdn4ffobgaB9lPBNuOBnue5cn6uYOMuP87sQB8rQ/MJ9CvxOaNQOdhcEJ/0LFQD
 UxqZ1KXRmnZ8j3qZfVvIzxO+IB0vTA==
 =tb2t
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201113-1' into staging

Two small additional fixes for the Ibex PLIC.

# gpg: Signature made Sat 14 Nov 2020 05:44:22 GMT
# gpg:                using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8  CE8F 21E1 0D29 DF97 7054

* remotes/alistair/tags/pull-riscv-to-apply-20201113-1:
  intc/ibex_plic: Ensure we don't loose interrupts
  intc/ibex_plic: Fix some typos in the comments

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-11-14 11:22:07 +00:00
commit b50ea0d54b
2 changed files with 19 additions and 3 deletions

View File

@ -45,9 +45,10 @@ static void ibex_plic_irqs_set_pending(IbexPlicState *s, int irq, bool level)
if (s->claimed[pending_num] & 1 << (irq % 32)) {
/*
* The interrupt has been claimed, but not compelted.
* The interrupt has been claimed, but not completed.
* The pending bit can't be set.
*/
s->hidden_pending[pending_num] |= level << (irq % 32);
return;
}
@ -133,7 +134,7 @@ static uint64_t ibex_plic_read(void *opaque, hwaddr addr,
int pending_num = s->claim / 32;
s->pending[pending_num] &= ~(1 << (s->claim % 32));
/* Set the interrupt as claimed, but not compelted */
/* Set the interrupt as claimed, but not completed */
s->claimed[pending_num] |= 1 << (s->claim % 32);
/* Return the current claimed interrupt */
@ -176,8 +177,21 @@ static void ibex_plic_write(void *opaque, hwaddr addr,
s->claim = 0;
}
if (s->claimed[value / 32] & 1 << (value % 32)) {
int pending_num = value / 32;
/* This value was already claimed, clear it. */
s->claimed[value / 32] &= ~(1 << (value % 32));
s->claimed[pending_num] &= ~(1 << (value % 32));
if (s->hidden_pending[pending_num] & (1 << (value % 32))) {
/*
* If the bit in hidden_pending is set then that means we
* received an interrupt between claiming and completing
* the interrupt that hasn't since been de-asserted.
* On hardware this would trigger an interrupt, so let's
* trigger one here as well.
*/
s->pending[pending_num] |= 1 << (value % 32);
}
}
}
@ -239,6 +253,7 @@ static void ibex_plic_realize(DeviceState *dev, Error **errp)
int i;
s->pending = g_new0(uint32_t, s->pending_num);
s->hidden_pending = g_new0(uint32_t, s->pending_num);
s->claimed = g_new0(uint32_t, s->pending_num);
s->source = g_new0(uint32_t, s->source_num);
s->priority = g_new0(uint32_t, s->priority_num);

View File

@ -33,6 +33,7 @@ struct IbexPlicState {
MemoryRegion mmio;
uint32_t *pending;
uint32_t *hidden_pending;
uint32_t *claimed;
uint32_t *source;
uint32_t *priority;