OpenE2K/qemu-e2k
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PIC reset fix (initial patch by Hidemi KAWAI)

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@836 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2004-05-20 13:42:52 +00:00
parent 4399059e4d
commit b54ad0498e
4 changed files with 9 additions and 4 deletions
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1
Changelog
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@ -13,6 +13,7 @@ version 0.5.6:
- NE2K PCI support
- dummy VGA PCI support
- VGA font selection fix (Daniel Serpell)
- PIC reset fix (Hidemi KAWAI)
version 0.5.5:

5
cpu-all.h
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@ -569,7 +569,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
#define cpu_init cpu_x86_init
#define cpu_exec cpu_x86_exec
#define cpu_gen_code cpu_x86_gen_code
#define cpu_interrupt cpu_x86_interrupt
#define cpu_signal_handler cpu_x86_signal_handler
#define cpu_dump_state cpu_x86_dump_state
@ -579,7 +578,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
#define cpu_init cpu_arm_init
#define cpu_exec cpu_arm_exec
#define cpu_gen_code cpu_arm_gen_code
#define cpu_interrupt cpu_arm_interrupt
#define cpu_signal_handler cpu_arm_signal_handler
#define cpu_dump_state cpu_arm_dump_state
@ -589,7 +587,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
#define cpu_init cpu_sparc_init
#define cpu_exec cpu_sparc_exec
#define cpu_gen_code cpu_sparc_gen_code
#define cpu_interrupt cpu_sparc_interrupt
#define cpu_signal_handler cpu_sparc_signal_handler
#define cpu_dump_state cpu_sparc_dump_state
@ -599,7 +596,6 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
#define cpu_init cpu_ppc_init
#define cpu_exec cpu_ppc_exec
#define cpu_gen_code cpu_ppc_gen_code
#define cpu_interrupt cpu_ppc_interrupt
#define cpu_signal_handler cpu_ppc_signal_handler
#define cpu_dump_state cpu_ppc_dump_state
@ -620,6 +616,7 @@ extern int code_copy_enabled;
#define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
#define CPU_INTERRUPT_TIMER 0x08 /* internal timer exception pending */
void cpu_interrupt(CPUState *s, int mask);
void cpu_reset_interrupt(CPUState *env, int mask);
int cpu_breakpoint_insert(CPUState *env, target_ulong pc);
int cpu_breakpoint_remove(CPUState *env, target_ulong pc);

5
exec.c
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@ -1112,6 +1112,11 @@ void cpu_interrupt(CPUState *env, int mask)
}
}
void cpu_reset_interrupt(CPUState *env, int mask)
{
env->interrupt_request &= ~mask;
}
CPULogItem cpu_log_items[] = {
{ CPU_LOG_TB_OUT_ASM, "out_asm",
"show generated host assembly code for each compiled TB" },

2
hw/i8259.c
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@ -231,6 +231,8 @@ static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
tmp = s->elcr_mask;
memset(s, 0, sizeof(PicState));
s->elcr_mask = tmp;
/* deassert a pending interrupt */
cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
s->init_state = 1;
s->init4 = val & 1;