target/riscv: Don't save pc when exception return
As pc will be written by the xepc in exception return, just ignore pc in translation. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220120122050.41546-3-zhiwei_liu@c-sky.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -100,8 +100,8 @@ DEF_HELPER_2(csrr_i128, tl, env, int)
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DEF_HELPER_4(csrw_i128, void, env, int, tl, tl)
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DEF_HELPER_6(csrrw_i128, tl, env, int, tl, tl, tl, tl)
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#ifndef CONFIG_USER_ONLY
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DEF_HELPER_2(sret, tl, env, tl)
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DEF_HELPER_2(mret, tl, env, tl)
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DEF_HELPER_1(sret, tl, env)
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DEF_HELPER_1(mret, tl, env)
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DEF_HELPER_1(wfi, void, env)
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DEF_HELPER_1(tlb_flush, void, env)
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#endif
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@ -74,10 +74,8 @@ static bool trans_uret(DisasContext *ctx, arg_uret *a)
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static bool trans_sret(DisasContext *ctx, arg_sret *a)
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{
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#ifndef CONFIG_USER_ONLY
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tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
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if (has_ext(ctx, RVS)) {
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gen_helper_sret(cpu_pc, cpu_env, cpu_pc);
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gen_helper_sret(cpu_pc, cpu_env);
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tcg_gen_exit_tb(NULL, 0); /* no chaining */
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ctx->base.is_jmp = DISAS_NORETURN;
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} else {
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@ -92,8 +90,7 @@ static bool trans_sret(DisasContext *ctx, arg_sret *a)
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static bool trans_mret(DisasContext *ctx, arg_mret *a)
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{
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#ifndef CONFIG_USER_ONLY
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tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
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gen_helper_mret(cpu_pc, cpu_env, cpu_pc);
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gen_helper_mret(cpu_pc, cpu_env);
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tcg_gen_exit_tb(NULL, 0); /* no chaining */
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ctx->base.is_jmp = DISAS_NORETURN;
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return true;
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@ -115,7 +115,7 @@ target_ulong helper_csrrw_i128(CPURISCVState *env, int csr,
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#ifndef CONFIG_USER_ONLY
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target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb)
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target_ulong helper_sret(CPURISCVState *env)
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{
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uint64_t mstatus;
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target_ulong prev_priv, prev_virt;
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@ -176,7 +176,7 @@ target_ulong helper_sret(CPURISCVState *env, target_ulong cpu_pc_deb)
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return retpc;
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}
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target_ulong helper_mret(CPURISCVState *env, target_ulong cpu_pc_deb)
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target_ulong helper_mret(CPURISCVState *env)
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{
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if (!(env->priv >= PRV_M)) {
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riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
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