ppc init fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@957 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
fd0bbb12c3
commit
b6b8bd1819
@ -26,16 +26,22 @@
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#define BIOS_FILENAME "ppc_rom.bin"
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#define NVRAM_SIZE 0x2000
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#define KERNEL_LOAD_ADDR 0x01000000
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#define INITRD_LOAD_ADDR 0x01800000
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/* MacIO devices (mapped inside the MacIO address space): CUDA, DBDMA,
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NVRAM (not implemented). */
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static int dbdma_mem_index;
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static int cuda_mem_index;
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static int ide0_mem_index;
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static int ide1_mem_index;
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/* DBDMA: currently no op - should suffice right now */
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static void dbdma_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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printf("%s: 0x%08x <= 0x%08x\n", __func__, addr, value);
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}
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static void dbdma_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
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@ -48,6 +54,7 @@ static void dbdma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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static uint32_t dbdma_readb (void *opaque, target_phys_addr_t addr)
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{
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printf("%s: 0x%08x => 0x00000000\n", __func__, addr);
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return 0;
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}
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@ -78,6 +85,8 @@ static void macio_map(PCIDevice *pci_dev, int region_num,
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{
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cpu_register_physical_memory(addr + 0x08000, 0x1000, dbdma_mem_index);
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cpu_register_physical_memory(addr + 0x16000, 0x2000, cuda_mem_index);
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cpu_register_physical_memory(addr + 0x1f000, 0x1000, ide0_mem_index);
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cpu_register_physical_memory(addr + 0x20000, 0x1000, ide1_mem_index);
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}
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static void macio_init(void)
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@ -91,7 +100,7 @@ static void macio_init(void)
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in PearPC */
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d->config[0x00] = 0x6b; // vendor_id
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d->config[0x01] = 0x10;
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d->config[0x02] = 0x17;
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d->config[0x02] = 0x22;
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d->config[0x03] = 0x00;
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d->config[0x0a] = 0x00; // class_sub = pci2pci
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@ -113,10 +122,12 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
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const char *initrd_filename)
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{
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char buf[1024];
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openpic_t *openpic;
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m48t59_t *nvram;
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int PPC_io_memory;
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int ret, linux_boot, i, fd;
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unsigned long bios_offset;
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uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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linux_boot = (kernel_filename != NULL);
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@ -135,26 +146,55 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
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BIOS_SIZE, bios_offset | IO_MEM_ROM);
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cpu_single_env->nip = 0xfffffffc;
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if (linux_boot) {
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kernel_base = KERNEL_LOAD_ADDR;
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/* now we can load the kernel */
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kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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kernel_filename);
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exit(1);
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}
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/* load initrd */
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if (initrd_filename) {
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initrd_base = INITRD_LOAD_ADDR;
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initrd_size = load_image(initrd_filename,
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phys_ram_base + initrd_base);
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if (initrd_size < 0) {
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fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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initrd_filename);
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exit(1);
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}
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} else {
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initrd_base = 0;
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initrd_size = 0;
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}
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boot_device = 'm';
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} else {
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kernel_base = 0;
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kernel_size = 0;
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initrd_base = 0;
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initrd_size = 0;
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}
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/* Register CPU as a 74x/75x */
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cpu_ppc_register(cpu_single_env, 0x00080000);
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/* Set time-base frequency to 100 Mhz */
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cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
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isa_mem_base = 0xc0000000;
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isa_mem_base = 0x80000000;
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pci_pmac_init();
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/* Register 64 KB of ISA IO space */
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/* Register 8 MB of ISA IO space */
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PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL);
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cpu_register_physical_memory(0x80000000, 0x10000, PPC_io_memory);
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// cpu_register_physical_memory(0xfe000000, 0xfe010000, PPC_io_memory);
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cpu_register_physical_memory(0xF2000000, 0x00800000, PPC_io_memory);
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/* init basic PC hardware */
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vga_initialize(ds, phys_ram_base + ram_size, ram_size,
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vga_ram_size, 1);
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// openpic = openpic_init(0x00000000, 0xF0000000, 1);
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// pic_init(openpic);
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openpic = openpic_init(0x00000000, 0xF0000000, 1);
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/* XXX: suppress that */
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pic_init();
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// pit = pit_init(0x40, 0);
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/* XXX: use Mac Serial port */
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fd = serial_open_device();
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@ -164,30 +204,28 @@ void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
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pci_ne2000_init(&nd_table[i]);
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}
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pci_ide_init(bs_table);
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ide0_mem_index = pmac_ide_init(&bs_table[0], openpic, 0x13);
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ide1_mem_index = pmac_ide_init(&bs_table[2], openpic, 0x13);
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/* cuda also initialize ADB */
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cuda_mem_index = cuda_init();
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cuda_mem_index = cuda_init(openpic, 0x19);
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adb_kbd_init(&adb_bus);
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adb_mouse_init(&adb_bus);
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macio_init();
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nvram = m48t59_init(8, 0x0074, NVRAM_SIZE);
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PPC_NVRAM_set_params(nvram, NVRAM_SIZE, "PREP", ram_size, boot_device,
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0, 0,
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0,
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0,
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0, 0,
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/* XXX: need an option to load a NVRAM image */
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0
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);
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/* Special port to get debug messages from Open-Firmware */
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register_ioport_write(0xFF00, 0x04, 1, &PREP_debug_write, NULL);
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register_ioport_write(0xFF00, 0x04, 2, &PREP_debug_write, NULL);
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nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);
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pci_ppc_bios_init();
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if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
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graphic_depth = 15;
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PPC_NVRAM_set_params(nvram, NVRAM_SIZE, "CHRP", ram_size, boot_device,
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kernel_base, kernel_size,
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kernel_cmdline,
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initrd_base, initrd_size,
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/* XXX: need an option to load a NVRAM image */
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0,
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graphic_width, graphic_height, graphic_depth);
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/* No PCI init: the BIOS will do it */
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}
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@ -26,8 +26,9 @@
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//#define HARD_DEBUG_PPC_IO
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//#define DEBUG_PPC_IO
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#define KERNEL_LOAD_ADDR 0x01000000;
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#define INITRD_LOAD_ADDR 0x01800000;
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#define BIOS_FILENAME "ppc_rom.bin"
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#define KERNEL_LOAD_ADDR 0x01000000
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#define INITRD_LOAD_ADDR 0x01800000
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extern int loglevel;
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extern FILE *logfile;
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@ -39,7 +40,7 @@ extern FILE *logfile;
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#if defined (HARD_DEBUG_PPC_IO)
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#define PPC_IO_DPRINTF(fmt, args...) \
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do { \
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if (loglevel > 0) { \
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if (loglevel & CPU_LOG_IOPORT) { \
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fprintf(logfile, "%s: " fmt, __func__ , ##args); \
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} else { \
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printf("%s : " fmt, __func__ , ##args); \
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@ -48,7 +49,7 @@ do { \
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#elif defined (DEBUG_PPC_IO)
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#define PPC_IO_DPRINTF(fmt, args...) \
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do { \
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if (loglevel > 0) { \
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if (loglevel & CPU_LOG_IOPORT) { \
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fprintf(logfile, "%s: " fmt, __func__ , ##args); \
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} \
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} while (0)
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@ -56,7 +57,6 @@ do { \
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#define PPC_IO_DPRINTF(fmt, args...) do { } while (0)
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#endif
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#define BIOS_FILENAME "ppc_rom.bin"
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/* Constants for devices init */
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static const int ide_iobase[2] = { 0x1f0, 0x170 };
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static const int ide_iobase2[2] = { 0x3f6, 0x376 };
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@ -175,7 +175,6 @@ static struct {
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uint32_t eemck1;
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/* Error diagnostic */
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} XCSR;
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#endif
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static void PPC_XCSR_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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@ -242,6 +241,7 @@ static CPUReadMemoryFunc *PPC_XCSR_read[] = {
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&PPC_XCSR_readw,
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&PPC_XCSR_readl,
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};
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#endif
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/* Fake super-io ports for PREP platform (Intel 82378ZB) */
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typedef struct sysctrl_t {
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@ -413,7 +413,6 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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const char *initrd_filename)
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{
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char buf[1024];
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// void *openpic;
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m48t59_t *nvram;
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int PPC_io_memory;
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int ret, linux_boot, i, nb_nics1, fd;
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@ -506,7 +505,7 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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bs_table[2 * i], bs_table[2 * i + 1]);
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}
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kbd_init();
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DMA_init();
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DMA_init(1);
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// AUD_init();
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// SB16_init();
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@ -528,10 +527,12 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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PPC_intack_write, NULL);
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cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory);
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/* PowerPC control and status register group */
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#if 0
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PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write, NULL);
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cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory);
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#endif
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nvram = m48t59_init(8, 0x0074, NVRAM_SIZE);
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nvram = m48t59_init(8, 0, 0x0074, NVRAM_SIZE);
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if (nvram == NULL)
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return;
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sysctrl->nvram = nvram;
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@ -539,16 +540,11 @@ void ppc_prep_init(int ram_size, int vga_ram_size, int boot_device,
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/* Initialise NVRAM */
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PPC_NVRAM_set_params(nvram, NVRAM_SIZE, "PREP", ram_size, boot_device,
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kernel_base, kernel_size,
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(uint32_t)(long)kernel_cmdline,
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strlen(kernel_cmdline),
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kernel_cmdline,
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initrd_base, initrd_size,
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/* XXX: need an option to load a NVRAM image */
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0
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);
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/* Special port to get debug messages from Open-Firmware */
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register_ioport_write(0xFF00, 0x04, 1, &PREP_debug_write, NULL);
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register_ioport_write(0xFF00, 0x04, 2, &PREP_debug_write, NULL);
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0,
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graphic_width, graphic_height, graphic_depth);
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pci_ppc_bios_init();
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}
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