include/hw/ppc include/hw/pci-host: Drop extra typedefs

PnvChip is typedef'ed in five places, and PnvPhb4PecState in two.
Keep one, drop the others.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221222104628.659681-5-armbru@redhat.com>
This commit is contained in:
Markus Armbruster 2022-12-22 11:46:28 +01:00
parent c0a5a477f1
commit b6c80037ed
7 changed files with 8 additions and 17 deletions

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@ -12,9 +12,9 @@
#include "hw/pci/pcie_host.h"
#include "hw/pci/pcie_port.h"
#include "hw/ppc/pnv.h"
#include "qom/object.h"
typedef struct PnvChip PnvChip;
typedef struct PnvPhb4PecState PnvPhb4PecState;
struct PnvPHB {

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@ -15,7 +15,6 @@
#include "hw/pci-host/pnv_phb.h"
typedef struct PnvPHB3 PnvPHB3;
typedef struct PnvChip PnvChip;
/*
* PHB3 XICS Source for MSIs

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@ -16,10 +16,8 @@
#include "hw/ppc/xive.h"
#include "qom/object.h"
typedef struct PnvPhb4PecState PnvPhb4PecState;
typedef struct PnvPhb4PecStack PnvPhb4PecStack;
typedef struct PnvPHB4 PnvPHB4;
typedef struct PnvChip PnvChip;
/*
* We have one such address space wrapper per possible device under

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@ -22,14 +22,13 @@
#include "hw/cpu/core.h"
#include "target/ppc/cpu.h"
#include "hw/ppc/pnv.h"
#include "qom/object.h"
#define TYPE_PNV_CORE "powernv-cpu-core"
OBJECT_DECLARE_TYPE(PnvCore, PnvCoreClass,
PNV_CORE)
typedef struct PnvChip PnvChip;
struct PnvCore {
/*< private >*/
CPUCore parent_obj;

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@ -39,7 +39,7 @@ DECLARE_INSTANCE_CHECKER(PnvHomer, PNV10_HOMER,
struct PnvHomer {
DeviceState parent;
struct PnvChip *chip;
PnvChip *chip;
MemoryRegion pba_regs;
MemoryRegion regs;
};

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@ -21,6 +21,7 @@
#define PPC_PNV_LPC_H
#include "exec/memory.h"
#include "hw/ppc/pnv.h"
#include "hw/qdev-core.h"
#define TYPE_PNV_LPC "pnv-lpc"
@ -93,13 +94,8 @@ struct PnvLpcClass {
DeviceRealize parent_realize;
};
/*
* Old compilers error on typdef forward declarations. Keep them happy.
*/
struct PnvChip;
ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp);
int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset,
int pnv_dt_lpc(PnvChip *chip, void *fdt, int root_offset,
uint64_t lpcm_addr, uint64_t lpcm_size);
#endif /* PPC_PNV_LPC_H */

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@ -10,12 +10,11 @@
#ifndef PPC_PNV_XIVE_H
#define PPC_PNV_XIVE_H
#include "hw/ppc/pnv.h"
#include "hw/ppc/xive.h"
#include "qom/object.h"
#include "hw/ppc/xive2.h"
struct PnvChip;
#define TYPE_PNV_XIVE "pnv-xive"
OBJECT_DECLARE_TYPE(PnvXive, PnvXiveClass,
PNV_XIVE)
@ -31,7 +30,7 @@ struct PnvXive {
XiveRouter parent_obj;
/* Owning chip */
struct PnvChip *chip;
PnvChip *chip;
/* XSCOM addresses giving access to the controller registers */
MemoryRegion xscom_regs;
@ -106,7 +105,7 @@ typedef struct PnvXive2 {
Xive2Router parent_obj;
/* Owning chip */
struct PnvChip *chip;
PnvChip *chip;
/* XSCOM addresses giving access to the controller registers */
MemoryRegion xscom_regs;