intel_iommu: allow queued invalidation for IR
Queued invalidation is required for IR. This patch add basic support for interrupt cache invalidate requests. Since we currently have no IR cache implemented yet, we can just skip all interrupt cache invalidation requests for now. Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -1404,6 +1404,15 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s)
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}
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break;
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case VTD_INV_DESC_IEC:
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VTD_DPRINTF(INV, "Interrupt Entry Cache Invalidation "
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"not implemented yet");
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/*
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* Since currently we do not cache interrupt entries, we can
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* just mark this descriptor as "good" and move on.
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*/
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break;
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default:
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VTD_DPRINTF(GENERAL, "error: unkonw Invalidation Descriptor type "
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"hi 0x%"PRIx64 " lo 0x%"PRIx64 " type %"PRIu8,
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@ -286,6 +286,8 @@ typedef struct VTDInvDesc VTDInvDesc;
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#define VTD_INV_DESC_TYPE 0xf
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#define VTD_INV_DESC_CC 0x1 /* Context-cache Invalidate Desc */
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#define VTD_INV_DESC_IOTLB 0x2
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#define VTD_INV_DESC_IEC 0x4 /* Interrupt Entry Cache
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Invalidate Descriptor */
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#define VTD_INV_DESC_WAIT 0x5 /* Invalidation Wait Descriptor */
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#define VTD_INV_DESC_NONE 0 /* Not an Invalidate Descriptor */
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