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hw/m68k/mcf52xx: Replace hw_error() by qemu_log_mask() 

hw_error() calls exit(). This a bit overkill when we can log
the accesses as unimplemented or guest error.

When fuzzing the devices, we don't want the whole process to
exit. Replace some hw_error() calls by qemu_log_mask().

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200526094052.1723-3-f4bug@amsat.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-05-26 11:40:52 +02:00 committed by Thomas Huth
parent ccff1ae4df
commit b809667808
4 changed files with 30 additions and 15 deletions
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10
hw/m68k/mcf5206.c
View File

@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
@ -225,7 +226,8 @@ static void m5206_mbar_update(m5206_mbar_state *s)
break;
default:
/* Unknown vector. */
error_report("Unhandled vector for IRQ %d", irq);
qemu_log_mask(LOG_UNIMP, "%s: Unhandled vector for IRQ %d\n",
__func__, irq);
vector = 0xf;
break;
}
@ -306,7 +308,8 @@ static uint64_t m5206_mbar_read(m5206_mbar_state *s,
case 0x170: return s->uivr[0];
case 0x1b0: return s->uivr[1];
}
hw_error("Bad MBAR read offset 0x%"PRIx16, offset);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%"PRIx16"\n",
__func__, offset);
return 0;
}
@ -360,7 +363,8 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint16_t offset,
s->uivr[1] = value;
break;
default:
hw_error("Bad MBAR write offset 0x%"PRIx16, offset);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad MBAR offset 0x%"PRIx16"\n",
__func__, offset);
break;
}
}

16
hw/m68k/mcf5208.c
View File

@ -9,10 +9,10 @@
#include "qemu/osdep.h"
#include "qemu/units.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/m68k/mcf.h"
#include "hw/m68k/mcf_fec.h"
@ -111,8 +111,9 @@ static void m5208_timer_write(void *opaque, hwaddr offset,
case 4:
break;
default:
hw_error("m5208_timer_write: Bad offset 0x%x\n", (int)offset);
break;
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, offset);
return;
}
m5208_timer_update(s);
}
@ -136,7 +137,8 @@ static uint64_t m5208_timer_read(void *opaque, hwaddr addr,
case 4:
return ptimer_get_count(s->timer);
default:
hw_error("m5208_timer_read: Bad offset 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, addr);
return 0;
}
}
@ -164,7 +166,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
return 0;
default:
hw_error("m5208_sys_read: Bad offset 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, addr);
return 0;
}
}
@ -172,7 +175,8 @@ static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
static void m5208_sys_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
__func__, addr);
}
static const MemoryRegionOps m5208_sys_ops = {

10
hw/m68k/mcf_intc.c
View File

@ -8,6 +8,7 @@
#include "qemu/osdep.h"
#include "qemu/module.h"
#include "qemu/log.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/irq.h"
@ -80,7 +81,9 @@ static uint64_t mcf_intc_read(void *opaque, hwaddr addr,
case 0xe1: case 0xe2: case 0xe3: case 0xe4:
case 0xe5: case 0xe6: case 0xe7:
/* LnIACK */
hw_error("mcf_intc_read: LnIACK not implemented\n");
qemu_log_mask(LOG_UNIMP, "%s: LnIACK not implemented (offset 0x%02x)\n",
__func__, offset);
/* fallthru */
default:
return 0;
}
@ -127,8 +130,9 @@ static void mcf_intc_write(void *opaque, hwaddr addr,
}
break;
default:
hw_error("mcf_intc_write: Bad write offset %d\n", offset);
break;
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%02x\n",
__func__, offset);
return;
}
mcf_intc_update(s);
}

9
hw/net/mcf_fec.c
View File

@ -7,7 +7,7 @@
*/
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "qemu/log.h"
#include "hw/irq.h"
#include "net/net.h"
#include "qemu/module.h"
@ -392,7 +392,8 @@ static uint64_t mcf_fec_read(void *opaque, hwaddr addr,
case 0x188: return s->emrbr;
case 0x200 ... 0x2e0: return s->mib[(addr & 0x1ff) / 4];
default:
hw_error("mcf_fec_read: Bad address 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
__func__, addr);
return 0;
}
}
@ -492,7 +493,9 @@ static void mcf_fec_write(void *opaque, hwaddr addr,
s->mib[(addr & 0x1ff) / 4] = value;
break;
default:
hw_error("mcf_fec_write Bad address 0x%x\n", (int)addr);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad address 0x%" HWADDR_PRIX "\n",
__func__, addr);
return;
}
mcf_fec_update(s);
}