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target/arm: Implement SVE2 integer add/subtract long with carry 

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525010358.152808-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2021-05-24 18:02:46 -07:00 committed by Peter Maydell
parent 38650638fb
commit b8295dfb48
4 changed files with 66 additions and 0 deletions
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3
target/arm/helper-sve.h
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@ -2416,3 +2416,6 @@ DEF_HELPER_FLAGS_5(sve2_uabal_s, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(sve2_uabal_d, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(sve2_adcl_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(sve2_adcl_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)

6
target/arm/sve.decode
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@ -1247,3 +1247,9 @@ SABALB 01000101 .. 0 ..... 1100 00 ..... ..... @rda_rn_rm
SABALT 01000101 .. 0 ..... 1100 01 ..... ..... @rda_rn_rm
UABALB 01000101 .. 0 ..... 1100 10 ..... ..... @rda_rn_rm
UABALT 01000101 .. 0 ..... 1100 11 ..... ..... @rda_rn_rm
## SVE2 integer add/subtract long with carry
# ADC and SBC decoded via size in helper dispatch.
ADCLB 01000101 .. 0 ..... 11010 0 ..... ..... @rda_rn_rm
ADCLT 01000101 .. 0 ..... 11010 1 ..... ..... @rda_rn_rm

34
target/arm/sve_helper.c
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@ -1269,6 +1269,40 @@ DO_ZZZW_ACC(sve2_uabal_d, uint64_t, uint32_t, , H1_4, DO_ABD)
#undef DO_ZZZW_ACC
void HELPER(sve2_adcl_s)(void *vd, void *vn, void *vm, void *va, uint32_t desc)
{
intptr_t i, opr_sz = simd_oprsz(desc);
int sel = H4(extract32(desc, SIMD_DATA_SHIFT, 1));
uint32_t inv = -extract32(desc, SIMD_DATA_SHIFT + 1, 1);
uint32_t *a = va, *n = vn;
uint64_t *d = vd, *m = vm;
for (i = 0; i < opr_sz / 8; ++i) {
uint32_t e1 = a[2 * i + H4(0)];
uint32_t e2 = n[2 * i + sel] ^ inv;
uint64_t c = extract64(m[i], 32, 1);
/* Compute and store the entire 33-bit result at once. */
d[i] = c + e1 + e2;
}
}
void HELPER(sve2_adcl_d)(void *vd, void *vn, void *vm, void *va, uint32_t desc)
{
intptr_t i, opr_sz = simd_oprsz(desc);
int sel = extract32(desc, SIMD_DATA_SHIFT, 1);
uint64_t inv = -(uint64_t)extract32(desc, SIMD_DATA_SHIFT + 1, 1);
uint64_t *d = vd, *a = va, *n = vn, *m = vm;
for (i = 0; i < opr_sz / 8; i += 2) {
Int128 e1 = int128_make64(a[i]);
Int128 e2 = int128_make64(n[i + sel] ^ inv);
Int128 c = int128_make64(m[i + 1] & 1);
Int128 r = int128_add(int128_add(e1, e2), c);
d[i + 0] = int128_getlo(r);
d[i + 1] = int128_gethi(r);
}
}
#define DO_BITPERM(NAME, TYPE, OP) \
void HELPER(NAME)(void *vd, void *vn, void *vm, uint32_t desc) \
{ \

23
target/arm/translate-sve.c
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@ -6371,3 +6371,26 @@ static bool trans_UABALT(DisasContext *s, arg_rrrr_esz *a)
{
return do_abal(s, a, true, true);
}
static bool do_adcl(DisasContext *s, arg_rrrr_esz *a, bool sel)
{
static gen_helper_gvec_4 * const fns[2] = {
gen_helper_sve2_adcl_s,
gen_helper_sve2_adcl_d,
};
/*
* Note that in this case the ESZ field encodes both size and sign.
* Split out 'subtract' into bit 1 of the data field for the helper.
*/
return do_sve2_zzzz_ool(s, a, fns[a->esz & 1], (a->esz & 2) | sel);
}
static bool trans_ADCLB(DisasContext *s, arg_rrrr_esz *a)
{
return do_adcl(s, a, false);
}
static bool trans_ADCLT(DisasContext *s, arg_rrrr_esz *a)
{
return do_adcl(s, a, true);
}