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Add flags to support PowerPC 405 bootinfos variations.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3245 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-09-26 23:55:31 +00:00
parent a750fc0b91
commit b8d3f5d126
3 changed files with 6 additions and 4 deletions
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3
hw/ppc405.h
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@ -57,7 +57,8 @@ struct ppc4xx_bd_info_t {
CPUState *ppc405_init (const unsigned char *cpu_model, CPUState *ppc405_init (const unsigned char *cpu_model,
clk_setup_t *cpu_clk, clk_setup_t *tb_clk, clk_setup_t *cpu_clk, clk_setup_t *tb_clk,
uint32_t sysclk); uint32_t sysclk);
ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd); ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd,
uint32_t flags);
/* */ /* */
typedef struct ppc4xx_mmio_t ppc4xx_mmio_t; typedef struct ppc4xx_mmio_t ppc4xx_mmio_t;

2
hw/ppc405_boards.c
View File

@ -288,7 +288,7 @@ static void ref405ep_init (int ram_size, int vga_ram_size, int boot_device,
bd.bi_plb_busfreq = 33333333; bd.bi_plb_busfreq = 33333333;
bd.bi_pci_busfreq = 33333333; bd.bi_pci_busfreq = 33333333;
bd.bi_opbfreq = 33333333; bd.bi_opbfreq = 33333333;
bdloc = ppc405_set_bootinfo(env, &bd); bdloc = ppc405_set_bootinfo(env, &bd, 0x00000001);
env->gpr[3] = bdloc; env->gpr[3] = bdloc;
kernel_base = KERNEL_LOAD_ADDR; kernel_base = KERNEL_LOAD_ADDR;
/* now we can load the kernel */ /* now we can load the kernel */

5
hw/ppc405_uc.c
View File

@ -69,7 +69,8 @@ CPUState *ppc405_init (const unsigned char *cpu_model,
return env; return env;
} }
ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd) ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd,
uint32_t flags)
{ {
ram_addr_t bdloc; ram_addr_t bdloc;
int i, n; int i, n;
@ -103,7 +104,7 @@ ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd)
for (i = 0; i < 6; i++) for (i = 0; i < 6; i++)
stb_raw(phys_ram_base + bdloc + 0x64 + i, bd->bi_pci_enetaddr[i]); stb_raw(phys_ram_base + bdloc + 0x64 + i, bd->bi_pci_enetaddr[i]);
n = 0x6A; n = 0x6A;
if (env->spr[SPR_PVR] == CPU_PPC_405EP) { if (flags & 0x00000001) {
for (i = 0; i < 6; i++) for (i = 0; i < 6; i++)
stb_raw(phys_ram_base + bdloc + n++, bd->bi_pci_enetaddr2[i]); stb_raw(phys_ram_base + bdloc + n++, bd->bi_pci_enetaddr2[i]);
} }