OpenE2K/qemu-e2k
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hw/m68k/irqc: Pass CPU using QOM link property

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Avoid the interrupt controller directly access the 'first_cpu'
global. Pass 'cpu' from the board code.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231024083010.12453-2-philmd@linaro.org>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-10-24 10:30:04 +02:00 committed by Thomas Huth
parent 6c9ae1ce82
commit b8fc619550
3 changed files with 12 additions and 1 deletions
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10
hw/intc/m68k_irqc.c
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@ -11,6 +11,7 @@
#include "cpu.h" #include "cpu.h"
#include "migration/vmstate.h" #include "migration/vmstate.h"
#include "monitor/monitor.h" #include "monitor/monitor.h"
#include "hw/qdev-properties.h"
#include "hw/nmi.h" #include "hw/nmi.h"
#include "hw/intc/intc.h" #include "hw/intc/intc.h"
#include "hw/intc/m68k_irqc.h" #include "hw/intc/m68k_irqc.h"
@ -35,7 +36,7 @@ static void m68k_irqc_print_info(InterruptStatsProvider *obj, Monitor *mon)
static void m68k_set_irq(void *opaque, int irq, int level) static void m68k_set_irq(void *opaque, int irq, int level)
{ {
M68KIRQCState *s = opaque; M68KIRQCState *s = opaque;
M68kCPU *cpu = M68K_CPU(first_cpu); M68kCPU *cpu = M68K_CPU(s->cpu);
int i; int i;
if (level) { if (level) {
@ -85,12 +86,19 @@ static const VMStateDescription vmstate_m68k_irqc = {
} }
}; };
static Property m68k_irqc_properties[] = {
DEFINE_PROP_LINK("m68k-cpu", M68KIRQCState, cpu,
TYPE_M68K_CPU, ArchCPU *),
DEFINE_PROP_END_OF_LIST(),
};
static void m68k_irqc_class_init(ObjectClass *oc, void *data) static void m68k_irqc_class_init(ObjectClass *oc, void *data)
{ {
DeviceClass *dc = DEVICE_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc);
NMIClass *nc = NMI_CLASS(oc); NMIClass *nc = NMI_CLASS(oc);
InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(oc); InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(oc);
device_class_set_props(dc, m68k_irqc_properties);
nc->nmi_monitor_handler = m68k_nmi; nc->nmi_monitor_handler = m68k_nmi;
dc->reset = m68k_irqc_reset; dc->reset = m68k_irqc_reset;
dc->vmsd = &vmstate_m68k_irqc; dc->vmsd = &vmstate_m68k_irqc;

2
hw/m68k/virt.c
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@ -155,6 +155,8 @@ static void virt_init(MachineState *machine)
/* IRQ Controller */ /* IRQ Controller */
irqc_dev = qdev_new(TYPE_M68K_IRQC); irqc_dev = qdev_new(TYPE_M68K_IRQC);
object_property_set_link(OBJECT(irqc_dev), "m68k-cpu",
OBJECT(cpu), &error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal);
/* /*

1
include/hw/intc/m68k_irqc.h
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@ -33,6 +33,7 @@ typedef struct M68KIRQCState {
SysBusDevice parent_obj; SysBusDevice parent_obj;
uint8_t ipr; uint8_t ipr;
ArchCPU *cpu;
/* statistics */ /* statistics */
uint64_t stats_irq_count[M68K_IRQC_LEVEL_NUM]; uint64_t stats_irq_count[M68K_IRQC_LEVEL_NUM];