From 8f54bbd0b4d9218e7c56a3a9c572b70943579e22 Mon Sep 17 00:00:00 2001 From: Michal Privoznik Date: Mon, 30 Dec 2019 09:00:51 +0100 Subject: [PATCH 01/38] x86: Check for machine state object class before typecasting it MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In ed9e923c3c ("x86: move SMM property to X86MachineState", 2019-12-17) In v4.2.0-246-ged9e923c3c the SMM property was moved from PC machine class to x86 machine class. Makes sense, but the change was too aggressive: in target/i386/kvm.c:kvm_arch_init() it altered check which sets SMRAM if given machine has SMM enabled. The line that detects whether given machine object is class of PC_MACHINE was removed from the check. This makes qemu try to enable SMRAM for all machine types, which is not what we want. Signed-off-by: Michal Privoznik Fixes: ed9e923c3c ("x86: move SMM property to X86MachineState", 2019-12-17) Reviewed-by: Philippe Mathieu-Daudé Message-Id: <7cc91bab3191bfd7e071bdd3fdf7fe2a2991deb0.1577692822.git.mprivozn@redhat.com> Signed-off-by: Paolo Bonzini --- target/i386/kvm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 0b511906e3..7ee3202634 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -2173,6 +2173,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } if (kvm_check_extension(s, KVM_CAP_X86_SMM) && + object_dynamic_cast(OBJECT(ms), TYPE_X86_MACHINE) && x86_machine_is_smm_enabled(X86_MACHINE(ms))) { smram_machine_done.notify = register_smram_listener; qemu_add_machine_init_done_notifier(&smram_machine_done); From d1972be13fd7125ca86a6aaf2690539cf9196ea1 Mon Sep 17 00:00:00 2001 From: Xiaoyao Li Date: Sat, 28 Dec 2019 18:43:26 +0800 Subject: [PATCH 02/38] accel/kvm: Make "kernel_irqchip" default on Commit 11bc4a13d1f4 ("kvm: convert "-machine kernel_irqchip" to an accelerator property") moves kernel_irqchip property from "-machine" to "-accel kvm", but it forgets to set the default value of kernel_irqchip_allowed and kernel_irqchip_split. Also cleaning up the three useless members (kernel_irqchip_allowed, kernel_irqchip_required, kernel_irqchip_split) in struct MachineState. Fixes: 11bc4a13d1f4 ("kvm: convert "-machine kernel_irqchip" to an accelerator property") Reported-by: Vitaly Kuznetsov Signed-off-by: Xiaoyao Li Message-Id: <20191228104326.21732-1-xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini --- accel/kvm/kvm-all.c | 19 +++++++++++++------ include/hw/boards.h | 3 --- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index b2f1a5bcb5..1ada2f4ecb 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -98,7 +98,7 @@ struct KVMState int kvm_shadow_mem; bool kernel_irqchip_allowed; bool kernel_irqchip_required; - bool kernel_irqchip_split; + OnOffAuto kernel_irqchip_split; bool sync_mmu; bool manual_dirty_log_protect; /* The man page (and posix) say ioctl numbers are signed int, but @@ -1783,6 +1783,7 @@ static void kvm_irqchip_create(KVMState *s) { int ret; + assert(s->kernel_irqchip_split != ON_OFF_AUTO_AUTO); if (kvm_check_extension(s, KVM_CAP_IRQCHIP)) { ; } else if (kvm_check_extension(s, KVM_CAP_S390_IRQCHIP)) { @@ -1799,7 +1800,7 @@ static void kvm_irqchip_create(KVMState *s) * in-kernel irqchip for us */ ret = kvm_arch_irqchip_create(s); if (ret == 0) { - if (s->kernel_irqchip_split) { + if (s->kernel_irqchip_split == ON_OFF_AUTO_ON) { perror("Split IRQ chip mode not supported."); exit(1); } else { @@ -2070,6 +2071,10 @@ static int kvm_init(MachineState *ms) goto err; } + if (s->kernel_irqchip_split == ON_OFF_AUTO_AUTO) { + s->kernel_irqchip_split = mc->default_kernel_irqchip_split ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; + } + if (s->kernel_irqchip_allowed) { kvm_irqchip_create(s); } @@ -3005,17 +3010,17 @@ static void kvm_set_kernel_irqchip(Object *obj, Visitor *v, case ON_OFF_SPLIT_ON: s->kernel_irqchip_allowed = true; s->kernel_irqchip_required = true; - s->kernel_irqchip_split = false; + s->kernel_irqchip_split = ON_OFF_AUTO_OFF; break; case ON_OFF_SPLIT_OFF: s->kernel_irqchip_allowed = false; s->kernel_irqchip_required = false; - s->kernel_irqchip_split = false; + s->kernel_irqchip_split = ON_OFF_AUTO_OFF; break; case ON_OFF_SPLIT_SPLIT: s->kernel_irqchip_allowed = true; s->kernel_irqchip_required = true; - s->kernel_irqchip_split = true; + s->kernel_irqchip_split = ON_OFF_AUTO_ON; break; default: /* The value was checked in visit_type_OnOffSplit() above. If @@ -3038,7 +3043,7 @@ bool kvm_kernel_irqchip_required(void) bool kvm_kernel_irqchip_split(void) { - return kvm_state->kernel_irqchip_split; + return kvm_state->kernel_irqchip_split == ON_OFF_AUTO_ON; } static void kvm_accel_instance_init(Object *obj) @@ -3046,6 +3051,8 @@ static void kvm_accel_instance_init(Object *obj) KVMState *s = KVM_STATE(obj); s->kvm_shadow_mem = -1; + s->kernel_irqchip_allowed = true; + s->kernel_irqchip_split = ON_OFF_AUTO_AUTO; } static void kvm_accel_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/boards.h b/include/hw/boards.h index 61f8bb8e5a..fb1b43d5b9 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -271,9 +271,6 @@ struct MachineState { /*< public >*/ - bool kernel_irqchip_allowed; - bool kernel_irqchip_required; - bool kernel_irqchip_split; char *dtb; char *dumpdtb; int phandle_start; From 3817261eb9e763cb2e71649201c7ec0823858f0c Mon Sep 17 00:00:00 2001 From: Denis Plotnikov Date: Mon, 23 Dec 2019 10:28:56 +0300 Subject: [PATCH 03/38] hw: fix using 4.2 compat in 5.0 machine types for i440fx/q35 5.0 machine type uses 4.2 compats. This seems to be incorrect, since the latests machine type by now is 5.0 and it should use its own compat or shouldn't use any relying on the defaults. Seems, like this appeared because of some problems on merge/rebase. Signed-off-by: Denis Plotnikov Reviewed-by: Cornelia Huck Reviewed-by: Igor Mammedov Message-Id: <20191223072856.5369-1-dplotnikov@virtuozzo.com> Signed-off-by: Paolo Bonzini --- hw/i386/pc_piix.c | 1 - hw/i386/pc_q35.c | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 721c7aa64e..fa12203079 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -425,7 +425,6 @@ static void pc_i440fx_5_0_machine_options(MachineClass *m) m->alias = "pc"; m->is_default = 1; pcmc->default_cpu_version = 1; - compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); } DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 52f45735e4..84cf925cf4 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -354,7 +354,6 @@ static void pc_q35_5_0_machine_options(MachineClass *m) pc_q35_machine_options(m); m->alias = "q35"; pcmc->default_cpu_version = 1; - compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); } DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL, From fc6b2dbac1d57fc24420fb8ee25911eb6f1d1fb5 Mon Sep 17 00:00:00 2001 From: Pavel Dovgalyuk Date: Thu, 19 Dec 2019 15:46:28 +0300 Subject: [PATCH 04/38] replay: check other timers for icount limit Record/replay can stall when there are no virtual devices that generate events - it just uses all the time for vCPU thread. Therefore main loop has to wait too much for the vCPU thread, because they are synchronized in rr mode. This patch does not let creating too long vCPU executions without interrupting to main loop. It checks realtime timers that always exits to control user input. Signed-off-by: Pavel Dovgalyuk Message-Id: <157675958855.14346.18049977447896411847.stgit@pasha-Precision-3630-Tower> Signed-off-by: Paolo Bonzini --- cpus.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/cpus.c b/cpus.c index b472378b70..be2d655f37 100644 --- a/cpus.c +++ b/cpus.c @@ -1316,6 +1316,10 @@ static int64_t tcg_get_icount_limit(void) */ deadline = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL, QEMU_TIMER_ATTR_ALL); + /* Check realtime timers, because they help with input processing */ + deadline = qemu_soonest_timeout(deadline, + qemu_clock_deadline_ns_all(QEMU_CLOCK_REALTIME, + QEMU_TIMER_ATTR_ALL)); /* Maintain prior (possibly buggy) behaviour where if no deadline * was set (as there is no QEMU_CLOCK_VIRTUAL timer) or it is more than From 878ec29b9c1915ea0da951064b8aac3050f2f5b9 Mon Sep 17 00:00:00 2001 From: Pavel Dovgalyuk Date: Thu, 19 Dec 2019 15:50:48 +0300 Subject: [PATCH 05/38] replay: record and replay random number sources Record/replay feature of icount allows deterministic running of execution scenarios. Some CPUs and peripheral devices read random numbers from external sources making deterministic execution impossible. This patch adds recording and replaying of random read operations into guest-random module, which is used by the virtual hardware. Signed-off-by: Pavel Dovgalyuk Message-Id: <157675984852.14505.15709141760677102489.stgit@pasha-Precision-3630-Tower> Signed-off-by: Paolo Bonzini --- docs/replay.txt | 1 + include/sysemu/replay.h | 7 +++++++ replay/Makefile.objs | 3 ++- replay/replay-internal.h | 2 ++ replay/replay-random.c | 44 ++++++++++++++++++++++++++++++++++++++++ replay/replay.c | 2 +- stubs/replay.c | 9 ++++++++ util/guest-random.c | 13 ++++++++++-- 8 files changed, 77 insertions(+), 4 deletions(-) create mode 100644 replay/replay-random.c diff --git a/docs/replay.txt b/docs/replay.txt index ce97c3f72f..f4619a62a3 100644 --- a/docs/replay.txt +++ b/docs/replay.txt @@ -67,6 +67,7 @@ Modifications of qemu include: * network filter for recording and replaying the packets * block driver for making block layer deterministic * serial port input record and replay + * recording of random numbers obtained from the external sources Locking and thread synchronisation ---------------------------------- diff --git a/include/sysemu/replay.h b/include/sysemu/replay.h index 8df517298c..5471bb514d 100644 --- a/include/sysemu/replay.h +++ b/include/sysemu/replay.h @@ -117,6 +117,13 @@ int64_t replay_read_clock(ReplayClockKind kind); ? replay_save_clock((clock), (value), cpu_get_icount_raw_locked()) \ : (value)) +/* Processing data from random generators */ + +/* Saves the values from the random number generator */ +void replay_save_random(int ret, void *buf, size_t len); +/* Loads the saved values for the random number generator */ +int replay_read_random(void *buf, size_t len); + /* Events */ /*! Called when qemu shutdown is requested. */ diff --git a/replay/Makefile.objs b/replay/Makefile.objs index cee6539a23..939be964a9 100644 --- a/replay/Makefile.objs +++ b/replay/Makefile.objs @@ -6,4 +6,5 @@ common-obj-y += replay-input.o common-obj-y += replay-char.o common-obj-y += replay-snapshot.o common-obj-y += replay-net.o -common-obj-y += replay-audio.o \ No newline at end of file +common-obj-y += replay-audio.o +common-obj-y += replay-random.o diff --git a/replay/replay-internal.h b/replay/replay-internal.h index 55fca1ac6b..33ac551e78 100644 --- a/replay/replay-internal.h +++ b/replay/replay-internal.h @@ -34,6 +34,8 @@ enum ReplayEvents { EVENT_AUDIO_OUT, /* for audio in event */ EVENT_AUDIO_IN, + /* for random number generator */ + EVENT_RANDOM, /* for clock read/writes */ /* some of greater codes are reserved for clocks */ EVENT_CLOCK, diff --git a/replay/replay-random.c b/replay/replay-random.c new file mode 100644 index 0000000000..afc7a0fccc --- /dev/null +++ b/replay/replay-random.c @@ -0,0 +1,44 @@ +/* + * replay-random.c + * + * Copyright (c) 2010-2020 Institute for System Programming + * of the Russian Academy of Sciences. + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "sysemu/replay.h" +#include "replay-internal.h" + +void replay_save_random(int ret, void *buf, size_t len) +{ + g_assert(replay_mutex_locked()); + + replay_save_instructions(); + replay_put_event(EVENT_RANDOM); + replay_put_dword(ret); + replay_put_array(buf, len); +} + +int replay_read_random(void *buf, size_t len) +{ + int ret = 0; + g_assert(replay_mutex_locked()); + + replay_account_executed_instructions(); + if (replay_next_event_is(EVENT_RANDOM)) { + size_t buf_size = 0; + ret = replay_get_dword(); + replay_get_array(buf, &buf_size); + replay_finish_event(); + g_assert(buf_size == len); + } else { + error_report("Missing random event in the replay log"); + exit(1); + } + return ret; +} diff --git a/replay/replay.c b/replay/replay.c index 5cc25bd2f8..706c7b4f4b 100644 --- a/replay/replay.c +++ b/replay/replay.c @@ -22,7 +22,7 @@ /* Current version of the replay mechanism. Increase it when file format changes. */ -#define REPLAY_VERSION 0xe02008 +#define REPLAY_VERSION 0xe02009 /* Size of replay log header */ #define HEADER_SIZE (sizeof(uint32_t) + sizeof(uint64_t)) diff --git a/stubs/replay.c b/stubs/replay.c index 10b3925e2f..5974ec1f50 100644 --- a/stubs/replay.c +++ b/stubs/replay.c @@ -79,3 +79,12 @@ void replay_mutex_lock(void) void replay_mutex_unlock(void) { } + +void replay_save_random(int ret, void *buf, size_t len) +{ +} + +int replay_read_random(void *buf, size_t len) +{ + return 0; +} diff --git a/util/guest-random.c b/util/guest-random.c index 9453968bd7..086115bd67 100644 --- a/util/guest-random.c +++ b/util/guest-random.c @@ -14,6 +14,7 @@ #include "qapi/error.h" #include "qemu/guest-random.h" #include "crypto/random.h" +#include "sysemu/replay.h" static __thread GRand *thread_rand; @@ -44,13 +45,21 @@ static int glib_random_bytes(void *buf, size_t len) int qemu_guest_getrandom(void *buf, size_t len, Error **errp) { + int ret; + if (replay_mode == REPLAY_MODE_PLAY) { + return replay_read_random(buf, len); + } if (unlikely(deterministic)) { /* Deterministic implementation using Glib's Mersenne Twister. */ - return glib_random_bytes(buf, len); + ret = glib_random_bytes(buf, len); } else { /* Non-deterministic implementation using crypto routines. */ - return qcrypto_random_bytes(buf, len, errp); + ret = qcrypto_random_bytes(buf, len, errp); } + if (replay_mode == REPLAY_MODE_RECORD) { + replay_save_random(ret, buf, len); + } + return ret; } void qemu_guest_getrandom_nofail(void *buf, size_t len) From 218fc2b5c83948fe75a6de09be14fb8aef09bb10 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 20 Dec 2019 16:42:25 +0100 Subject: [PATCH 06/38] hw/i386/x86-iommu: Add missing stubs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In commit 6c730e4af9 we introduced a stub to build the MicroVM machine without Intel IOMMU. This stub is incomplete for the other PC machines. Add the missing stubs. Fixes: 6c730e4af9 ("pc: stubify x86 iommu", 2019-12-17) Reported-by: Travis-CI Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191220154225.25879-1-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/i386/x86-iommu-stub.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/i386/x86-iommu-stub.c b/hw/i386/x86-iommu-stub.c index 03576cdccb..c5ba077f9d 100644 --- a/hw/i386/x86-iommu-stub.c +++ b/hw/i386/x86-iommu-stub.c @@ -32,3 +32,12 @@ X86IOMMUState *x86_iommu_get_default(void) return NULL; } +bool x86_iommu_ir_supported(X86IOMMUState *s) +{ + return false; +} + +IommuType x86_iommu_get_type(void) +{ + abort(); +} From a88c40f02ace88f09b2a85a64831b277b2ebc88c Mon Sep 17 00:00:00 2001 From: Peter Wu Date: Sat, 21 Dec 2019 17:21:24 +0100 Subject: [PATCH 07/38] hw/i386/pc: fix regression in parsing vga cmdline parameter When the 'vga=' parameter is succeeded by another parameter, QEMU 4.2.0 would refuse to start with a rather cryptic message: $ qemu-system-x86_64 -kernel /boot/vmlinuz-linux -append 'vga=792 quiet' qemu: can't parse 'vga' parameter: Invalid argument It was not clear whether this applied to the '-vga std' parameter or the '-append' one. Fix the parsing regression and clarify the error. Fixes: 133ef074bd ("hw/i386/pc: replace use of strtol with qemu_strtoui in x86_load_linux()") Cc: Sergio Lopez Signed-off-by: Peter Wu Message-Id: <20191221162124.1159291-1-peter@lekensteyn.nl> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini --- hw/i386/x86.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index d8bb5c2a96..9b9a4d5837 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -612,6 +612,7 @@ void x86_load_linux(X86MachineState *x86ms, vmode = strstr(kernel_cmdline, "vga="); if (vmode) { unsigned int video_mode; + const char *end; int ret; /* skip "vga=" */ vmode += 4; @@ -622,10 +623,9 @@ void x86_load_linux(X86MachineState *x86ms, } else if (!strncmp(vmode, "ask", 3)) { video_mode = 0xfffd; } else { - ret = qemu_strtoui(vmode, NULL, 0, &video_mode); - if (ret != 0) { - fprintf(stderr, "qemu: can't parse 'vga' parameter: %s\n", - strerror(-ret)); + ret = qemu_strtoui(vmode, &end, 0, &video_mode); + if (ret != 0 || (*end && *end != ' ')) { + fprintf(stderr, "qemu: invalid 'vga=' kernel parameter.\n"); exit(1); } } From dccdaa1f756fedee2f1dac3650e19f29572f76c4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 6 Jan 2020 18:19:12 +0100 Subject: [PATCH 08/38] hw/timer/Kconfig: Intel 8254 PIT depends of ISA bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since i8254_common.c calls isa_register_ioport() from "hw/isa/isa.h" we can not select it when ISA_BUS is disabled. Add a 'depends on' clause. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20200106171912.16523-1-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/timer/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig index a990f9fe35..59b3f44d69 100644 --- a/hw/timer/Kconfig +++ b/hw/timer/Kconfig @@ -15,6 +15,7 @@ config HPET config I8254 bool + depends on ISA_BUS config ALTERA_TIMER bool From be3d7ee960143959c5866daf15f2ab93f3f282b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:03 +0100 Subject: [PATCH 09/38] hw/usb/redirect: Do not link 'usb-redir' device when USB not enabled MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The 'usb-redir' device requires the USB core code to work. Do not link it when there is no USB support. This fixes: $ qemu-system-tricore -M tricore_testboard -device usb-redir qemu-system-tricore: -device usb-redir: No 'usb-bus' bus found for device 'usb-redir' Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-2-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/usb/Makefile.objs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs index 0ab20f9d73..0052d49ce1 100644 --- a/hw/usb/Makefile.objs +++ b/hw/usb/Makefile.objs @@ -39,9 +39,11 @@ common-obj-$(CONFIG_USB_STORAGE_MTP) += dev-mtp.o endif # usb redirection +ifeq ($(CONFIG_USB),y) common-obj-$(CONFIG_USB_REDIR) += redirect.o quirks.o redirect.o-cflags = $(USB_REDIR_CFLAGS) redirect.o-libs = $(USB_REDIR_LIBS) +endif # usb pass-through ifeq ($(CONFIG_USB_LIBUSB)$(CONFIG_USB),yy) From 48ca2c4aa174aebedfdd64369697e467e30ffd22 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:04 +0100 Subject: [PATCH 10/38] hw/intc/i8259: Fix Kconfig dependency on ISA bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The 8259 Interrupt Controller sits on a ISA bus. Add the missing dependency to fix: LINK x86_64-softmmu/qemu-system-x86_64 /usr/bin/ld: ../hw/intc/i8259_common.o: in function `pic_common_realize': hw/intc/i8259_common.c:84: undefined reference to `isa_register_ioport' /usr/bin/ld: hw/intc/i8259_common.c:86: undefined reference to `isa_register_ioport' /usr/bin/ld: ../hw/intc/i8259_common.o: in function `i8259_init_chip': hw/intc/i8259_common.c:97: undefined reference to `isa_create' collect2: error: ld returned 1 exit status make[1]: *** [Makefile:206: qemu-system-x86_64] Error 1 Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/intc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index 10a680b53a..a189d6fedd 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -3,6 +3,7 @@ config HEATHROW_PIC config I8259 bool + select ISA_BUS config PL190 bool From ff2efdcdc1674b31fcad64d668a4da01cd454b82 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:05 +0100 Subject: [PATCH 11/38] hw/i386/Kconfig: Let the MicroVM machine select the SERIAL_ISA config MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When configured with --without-default-devices, the build fails: LINK x86_64-softmmu/qemu-system-x86_64 /usr/bin/ld: hw/i386/microvm.o: in function `microvm_devices_init': hw/i386/microvm.c:157: undefined reference to `serial_hds_isa_init' collect2: error: ld returned 1 exit status make[1]: *** [Makefile:206: qemu-system-x86_64] Error 1 make: *** [Makefile:483: x86_64-softmmu/all] Error 2 While the MicroVM machine only uses the ISA serial port when the MICROVM_MACHINE_ISA_SERIAL property is set, it has to be linked with it. Replace the 'imply' Kconfig rule by a 'select'. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-4-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/i386/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 91cf5843b4..cdc851598c 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -95,7 +95,7 @@ config Q35 config MICROVM bool - imply SERIAL_ISA + select SERIAL_ISA # for serial_hds_isa_init() select ISA_BUS select APIC select IOAPIC From a0297be4bead925d0eea4a0de9ce8c3e48c2f43a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:08 +0100 Subject: [PATCH 12/38] hw/ppc/Kconfig: Restrict the MPC I2C controller to e500-based platforms MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only the PowerPC e500-based platforms use the MPC I2C controller. Do not build it for the other machines. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-7-philmd@redhat.com> Acked-by: David Gibson Signed-off-by: Paolo Bonzini --- default-configs/ppc-softmmu.mak | 1 - hw/ppc/Kconfig | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak index bf86128a0c..61b78b844d 100644 --- a/default-configs/ppc-softmmu.mak +++ b/default-configs/ppc-softmmu.mak @@ -1,7 +1,6 @@ # Default configuration for ppc-softmmu # For embedded PPCs: -CONFIG_MPC_I2C=y CONFIG_DS1338=y CONFIG_E500=y CONFIG_PPC405=y diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index f927ec9c74..0cd8d4053e 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -105,6 +105,7 @@ config E500 select PLATFORM_BUS select PPCE500_PCI select SERIAL + select MPC_I2C config VIRTEX bool From def9119efe20cf14204753426c20527efd97eed1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:09 +0100 Subject: [PATCH 13/38] hw/ppc/Kconfig: Let the Sam460ex board use the PowerPC 405 devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When configured with --without-default-devices, the build fails: LINK ppc-softmmu/qemu-system-ppc /usr/bin/ld: hw/ppc/sam460ex.o: in function `sam460ex_init': hw/ppc/sam460ex.c:313: undefined reference to `ppc4xx_plb_init' /usr/bin/ld: hw/ppc/sam460ex.c:353: undefined reference to `ppc405_ebc_init' collect2: error: ld returned 1 exit status make[1]: *** [Makefile:206: qemu-system-ppc] Error 1 Fix by selecting the PPC405 config. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-8-philmd@redhat.com> Reviewed-by: BALATON Zoltan Acked-by: David Gibson Signed-off-by: Paolo Bonzini --- hw/ppc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 0cd8d4053e..004b7d5ad5 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -50,6 +50,7 @@ config PPC4XX config SAM460EX bool + select PPC405 select PFLASH_CFI01 select IDE_SII3112 select M41T80 From 45b0bd10957d40dccc6d9a98d484d548df04e02c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:10 +0100 Subject: [PATCH 14/38] hw/ppc/Kconfig: Let the Xilinx Virtex5 ML507 use the PPC-440 devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When configured with --without-default-devices, the build fails: LINK ppc-softmmu/qemu-system-ppc /usr/bin/ld: hw/ppc/virtex_ml507.o: in function `ppc440_init_xilinx': hw/ppc/virtex_ml507.c:112: undefined reference to `ppcuic_init' collect2: error: ld returned 1 exit status make[1]: *** [Makefile:206: qemu-system-ppc] Error 1 make: *** [Makefile:483: ppc-softmmu/all] Error 2 Fix by selecting the PPC4XX config. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-9-philmd@redhat.com> Acked-by: David Gibson Signed-off-by: Paolo Bonzini --- hw/ppc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 004b7d5ad5..d8482a5e99 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -110,6 +110,7 @@ config E500 config VIRTEX bool + select PPC4XX select PFLASH_CFI01 select SERIAL select XILINX From 74969757226e49a7d6157f2ea03746a9ae106cc0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:11 +0100 Subject: [PATCH 15/38] hw/ppc/Makefile: Simplify the sPAPR PCI objects rule MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The CONFIG_PSERIES already selects CONFIG_PCI. Simplify the Makefile rules. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-10-philmd@redhat.com> Acked-by: David Gibson Signed-off-by: Paolo Bonzini --- hw/ppc/Makefile.objs | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 101e9fc591..79adf06aa3 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -7,14 +7,11 @@ obj-$(CONFIG_PSERIES) += spapr_pci.o spapr_rtc.o spapr_drc.o obj-$(CONFIG_PSERIES) += spapr_cpu_core.o spapr_ovec.o spapr_irq.o obj-$(CONFIG_PSERIES) += spapr_tpm_proxy.o obj-$(CONFIG_SPAPR_RNG) += spapr_rng.o +obj-$(call land,$(CONFIG_PSERIES),$(CONFIG_LINUX)) += spapr_pci_vfio.o spapr_pci_nvlink2.o # IBM PowerNV obj-$(CONFIG_POWERNV) += pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.o pnv_occ.o pnv_bmc.o obj-$(CONFIG_POWERNV) += pnv_homer.o pnv_pnor.o - -ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy) -obj-y += spapr_pci_vfio.o spapr_pci_nvlink2.o -endif obj-$(CONFIG_PSERIES) += spapr_rtas_ddw.o # PowerPC 4xx boards obj-$(CONFIG_PPC405) += ppc405_boards.o ppc405_uc.o From 032757adaa2fb77fcd2067c0063f32a4a8a78636 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:12 +0100 Subject: [PATCH 16/38] hw/ppc/Kconfig: Only select fw_cfg with machines using OpenBIOS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The fw_cfg helpers are only used by machines using OpenBIOS. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-11-philmd@redhat.com> Acked-by: David Gibson Signed-off-by: Paolo Bonzini --- hw/ppc/Kconfig | 6 ++++++ hw/ppc/Makefile.objs | 3 ++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index d8482a5e99..e4ca920507 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -72,6 +72,7 @@ config PREP select M48T59 select PC87312 select RS6000_MC + select FW_CFG_PPC config RS6000_MC bool @@ -85,6 +86,7 @@ config MAC_OLDWORLD select GRACKLE_PCI select HEATHROW_PIC select MACIO + select FW_CFG_PPC config MAC_NEWWORLD bool @@ -96,6 +98,7 @@ config MAC_NEWWORLD select MACIO_GPIO select MAC_PMU select UNIN_PCI + select FW_CFG_PPC config E500 bool @@ -130,3 +133,6 @@ config XIVE_KVM bool default y depends on XIVE_SPAPR && KVM + +config FW_CFG_PPC + bool diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 79adf06aa3..5c46c68e44 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -1,5 +1,6 @@ # shared objects -obj-y += ppc.o ppc_booke.o fdt.o fw_cfg.o +obj-y += ppc.o ppc_booke.o fdt.o +obj-$(CONFIG_FW_CFG_PPC) += fw_cfg.o # IBM pSeries (sPAPR) obj-$(CONFIG_PSERIES) += spapr.o spapr_caps.o spapr_vio.o spapr_events.o obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o From b0048f760957512aecc0b1cb0f4325ed4e102acd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:13 +0100 Subject: [PATCH 17/38] hw/ppc/Kconfig: Only select FDT helper for machines using it MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Not all machines use the ppc_create_page_sizes_prop() helper. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-12-philmd@redhat.com> Acked-by: David Gibson Signed-off-by: Paolo Bonzini --- hw/ppc/Kconfig | 10 ++++++++++ hw/ppc/Makefile.objs | 3 ++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index e4ca920507..8e62d8f470 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -10,6 +10,7 @@ config PSERIES select XICS_SPAPR select XIVE_SPAPR select MSI_NONBROKEN + select FDT_PPC config SPAPR_RNG bool @@ -26,6 +27,7 @@ config POWERNV select MC146818RTC select XICS select XIVE + select FDT_PPC config PPC405 bool @@ -42,6 +44,7 @@ config PPC440 select PCI_EXPRESS select PPC4XX select SERIAL + select FDT_PPC config PPC4XX bool @@ -60,6 +63,7 @@ config SAM460EX select SMBUS_EEPROM select USB_EHCI_SYSBUS select USB_OHCI + select FDT_PPC config PREP bool @@ -110,6 +114,7 @@ config E500 select PPCE500_PCI select SERIAL select MPC_I2C + select FDT_PPC config VIRTEX bool @@ -118,6 +123,7 @@ config VIRTEX select SERIAL select XILINX select XILINX_ETHLITE + select FDT_PPC config XIVE bool @@ -134,5 +140,9 @@ config XIVE_KVM default y depends on XIVE_SPAPR && KVM +# Only used by 64-bit targets config FW_CFG_PPC bool + +config FDT_PPC + bool diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 5c46c68e44..a4bac57be6 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -1,5 +1,6 @@ # shared objects -obj-y += ppc.o ppc_booke.o fdt.o +obj-y += ppc.o ppc_booke.o +obj-$(CONFIG_FDT_PPC) += fdt.o obj-$(CONFIG_FW_CFG_PPC) += fw_cfg.o # IBM pSeries (sPAPR) obj-$(CONFIG_PSERIES) += spapr.o spapr_caps.o spapr_vio.o spapr_events.o From 3fd0305eaf9bb2756f4eafcf5602d1adac928e4c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:14 +0100 Subject: [PATCH 18/38] hw/nvram/Kconfig: Add an entry for the NMC93xx EEPROM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The NMC93xx EEPROM is only used by few NIC cards and the Am53C974 SCSI controller. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-13-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/net/Kconfig | 2 ++ hw/nvram/Kconfig | 4 ++++ hw/nvram/Makefile.objs | 2 +- hw/scsi/Kconfig | 1 + 4 files changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/net/Kconfig b/hw/net/Kconfig index 3856417d42..af6a11baf3 100644 --- a/hw/net/Kconfig +++ b/hw/net/Kconfig @@ -14,6 +14,7 @@ config EEPRO100_PCI bool default y if PCI_DEVICES depends on PCI + select NMC93XX_EEPROM config PCNET_PCI bool @@ -28,6 +29,7 @@ config TULIP bool default y if PCI_DEVICES depends on PCI + select NMC93XX_EEPROM config E1000_PCI bool diff --git a/hw/nvram/Kconfig b/hw/nvram/Kconfig index ebaa749ce9..24b0ce6a2d 100644 --- a/hw/nvram/Kconfig +++ b/hw/nvram/Kconfig @@ -7,3 +7,7 @@ config AT24C config MAC_NVRAM bool + +# NMC93XX uses the NS uWire interface (similar to SPI but less configurable) +config NMC93XX_EEPROM + bool diff --git a/hw/nvram/Makefile.objs b/hw/nvram/Makefile.objs index 26f7b4ca35..a4bdfbf187 100644 --- a/hw/nvram/Makefile.objs +++ b/hw/nvram/Makefile.objs @@ -1,5 +1,5 @@ common-obj-$(CONFIG_DS1225Y) += ds1225y.o -common-obj-y += eeprom93xx.o +common-obj-$(CONFIG_NMC93XX_EEPROM) += eeprom93xx.o common-obj-$(CONFIG_AT24C) += eeprom_at24c.o common-obj-y += fw_cfg.o common-obj-y += chrp_nvram.o diff --git a/hw/scsi/Kconfig b/hw/scsi/Kconfig index b3ba540c17..77d397c949 100644 --- a/hw/scsi/Kconfig +++ b/hw/scsi/Kconfig @@ -34,6 +34,7 @@ config ESP_PCI default y if PCI_DEVICES depends on PCI select ESP + select NMC93XX_EEPROM config SPAPR_VSCSI bool From 7bebc358df4781b6133c0d21da80a50a63a1d31a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 31 Dec 2019 19:32:15 +0100 Subject: [PATCH 19/38] hw/nvram/Kconfig: Restrict CHRP NVRAM to machines using OpenBIOS or SLOF MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Only the OpenBIOS and SLOF firmwares use the CHRP NVRAM layout. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191231183216.6781-14-philmd@redhat.com> Acked-by: David Gibson Signed-off-by: Paolo Bonzini --- hw/nvram/Kconfig | 4 ++++ hw/nvram/Makefile.objs | 2 +- hw/ppc/Kconfig | 1 + hw/sparc/Kconfig | 1 + hw/sparc64/Kconfig | 1 + 5 files changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/nvram/Kconfig b/hw/nvram/Kconfig index 24b0ce6a2d..e872fcb194 100644 --- a/hw/nvram/Kconfig +++ b/hw/nvram/Kconfig @@ -7,7 +7,11 @@ config AT24C config MAC_NVRAM bool + select CHRP_NVRAM # NMC93XX uses the NS uWire interface (similar to SPI but less configurable) config NMC93XX_EEPROM bool + +config CHRP_NVRAM + bool diff --git a/hw/nvram/Makefile.objs b/hw/nvram/Makefile.objs index a4bdfbf187..090df63fcd 100644 --- a/hw/nvram/Makefile.objs +++ b/hw/nvram/Makefile.objs @@ -2,7 +2,7 @@ common-obj-$(CONFIG_DS1225Y) += ds1225y.o common-obj-$(CONFIG_NMC93XX_EEPROM) += eeprom93xx.o common-obj-$(CONFIG_AT24C) += eeprom_at24c.o common-obj-y += fw_cfg.o -common-obj-y += chrp_nvram.o +common-obj-$(CONFIG_CHRP_NVRAM) += chrp_nvram.o common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o obj-$(CONFIG_PSERIES) += spapr_nvram.o obj-$(CONFIG_NRF51_SOC) += nrf51_nvm.o diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 8e62d8f470..e27efe9a24 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -11,6 +11,7 @@ config PSERIES select XIVE_SPAPR select MSI_NONBROKEN select FDT_PPC + select CHRP_NVRAM config SPAPR_RNG bool diff --git a/hw/sparc/Kconfig b/hw/sparc/Kconfig index 2a83a8010e..22aff2f5b7 100644 --- a/hw/sparc/Kconfig +++ b/hw/sparc/Kconfig @@ -12,6 +12,7 @@ config SUN4M select LANCE select M48T59 select STP2000 + select CHRP_NVRAM config LEON3 bool diff --git a/hw/sparc64/Kconfig b/hw/sparc64/Kconfig index f9f8b0f73a..980a201bb7 100644 --- a/hw/sparc64/Kconfig +++ b/hw/sparc64/Kconfig @@ -12,6 +12,7 @@ config SUN4U select IDE_CMD646 select PCKBD select SIMBA + select CHRP_NVRAM config NIAGARA bool From c9c6b2e1c485670763bb8aea4c769081b9a5fe56 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 24 Dec 2019 12:16:28 +0100 Subject: [PATCH 20/38] hw/rtc/mc146818: Add missing dependency on ISA Bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MC146818 sits on an ISA bus. Since it can not be used without it, select ISA in the Kconfig. Fixes: 82f5181777 ("kconfig: introduce kconfig files", 2019-03-07) Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191224111628.3551-1-philmd@redhat.com> Reviewed-by: Stefano Garzarella Signed-off-by: Paolo Bonzini --- hw/rtc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/rtc/Kconfig b/hw/rtc/Kconfig index 45daa8d655..3dc2dd6888 100644 --- a/hw/rtc/Kconfig +++ b/hw/rtc/Kconfig @@ -17,6 +17,7 @@ config TWL92230 depends on I2C config MC146818RTC + depends on ISA_BUS bool config SUN4V_RTC From 5a07192a042e60ce7415279a48aff8a932829f55 Mon Sep 17 00:00:00 2001 From: "mkdolata@us.ibm.com" Date: Tue, 7 Jan 2020 14:26:07 +0100 Subject: [PATCH 21/38] target/i386: Fix handling of k_gs_base register in 32-bit mode in gdbstub gdb-xml/i386-32bit.xml includes the k_gs_base register too, so we have to handle it even if TARGET_X86_64 is not defined. This is already done in x86_cpu_gdb_read_register, but not in x86_cpu_gdb_write_register where the incorrect return value causes all registers after it to be clobbered. Fixes https://bugs.launchpad.net/qemu/+bug/1857640. Signed-off-by: Marek Dolata Signed-off-by: Paolo Bonzini --- target/i386/gdbstub.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c index aef25b70f1..572ead641c 100644 --- a/target/i386/gdbstub.c +++ b/target/i386/gdbstub.c @@ -350,15 +350,15 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) env->segs[R_GS].base = ldl_p(mem_buf); return 4; -#ifdef TARGET_X86_64 case IDX_SEG_REGS + 8: +#ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { env->kernelgsbase = ldq_p(mem_buf); return 8; } env->kernelgsbase = ldl_p(mem_buf); - return 4; #endif + return 4; case IDX_FP_REGS + 8: cpu_set_fpuc(env, ldl_p(mem_buf)); From 6c997b4adb300788d61d72e2b8bc67c03a584956 Mon Sep 17 00:00:00 2001 From: Xiaoyao Li Date: Wed, 25 Dec 2019 14:30:17 +0800 Subject: [PATCH 22/38] target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES The bit 6, 7 and 8 of MSR_IA32_ARCH_CAPABILITIES are recently disclosed for some security issues. Add the definitions for them to be used by named CPU models. Signed-off-by: Xiaoyao Li Message-Id: <20191225063018.20038-2-xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.h | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index af282936a7..594326a794 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -835,12 +835,15 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_TOPOLOGY_LEVEL_DIE (5U << 8) /* MSR Feature Bits */ -#define MSR_ARCH_CAP_RDCL_NO (1U << 0) -#define MSR_ARCH_CAP_IBRS_ALL (1U << 1) -#define MSR_ARCH_CAP_RSBA (1U << 2) +#define MSR_ARCH_CAP_RDCL_NO (1U << 0) +#define MSR_ARCH_CAP_IBRS_ALL (1U << 1) +#define MSR_ARCH_CAP_RSBA (1U << 2) #define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3) -#define MSR_ARCH_CAP_SSB_NO (1U << 4) -#define MSR_ARCH_CAP_MDS_NO (1U << 5) +#define MSR_ARCH_CAP_SSB_NO (1U << 4) +#define MSR_ARCH_CAP_MDS_NO (1U << 5) +#define MSR_ARCH_CAP_PSCHANGE_MC_NO (1U << 6) +#define MSR_ARCH_CAP_TSX_CTRL_MSR (1U << 7) +#define MSR_ARCH_CAP_TAA_NO (1U << 8) #define MSR_CORE_CAP_SPLIT_LOCK_DETECT (1U << 5) From 2dea9d9ca4ea7e9afe83d0b4153b21a16987e866 Mon Sep 17 00:00:00 2001 From: Xiaoyao Li Date: Wed, 25 Dec 2019 14:30:18 +0800 Subject: [PATCH 23/38] target/i386: Add missed features to Cooperlake CPU model It lacks VMX features and two security feature bits (disclosed recently) in MSR_IA32_ARCH_CAPABILITIES in current Cooperlake CPU model, so add them. Fixes: 22a866b6166d ("i386: Add new CPU model Cooperlake") Signed-off-by: Xiaoyao Li Message-Id: <20191225063018.20038-3-xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 31556b7ec4..41f28cebf9 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3198,7 +3198,8 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_7_0_EDX_SPEC_CTRL_SSBD | CPUID_7_0_EDX_ARCH_CAPABILITIES, .features[FEAT_ARCH_CAPABILITIES] = MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL | - MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO, + MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO | + MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO, .features[FEAT_7_1_EAX] = CPUID_7_1_EAX_AVX512_BF16, /* @@ -3213,6 +3214,54 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_XSAVE_XGETBV1, .features[FEAT_6_EAX] = CPUID_6_EAX_ARAT, + /* Missing: Mode-based execute control (XS/XU), processor tracing, TSC scaling */ + .features[FEAT_VMX_BASIC] = MSR_VMX_BASIC_INS_OUTS | + MSR_VMX_BASIC_TRUE_CTLS, + .features[FEAT_VMX_ENTRY_CTLS] = VMX_VM_ENTRY_IA32E_MODE | + VMX_VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | VMX_VM_ENTRY_LOAD_IA32_PAT | + VMX_VM_ENTRY_LOAD_DEBUG_CONTROLS | VMX_VM_ENTRY_LOAD_IA32_EFER, + .features[FEAT_VMX_EPT_VPID_CAPS] = MSR_VMX_EPT_EXECONLY | + MSR_VMX_EPT_PAGE_WALK_LENGTH_4 | MSR_VMX_EPT_WB | MSR_VMX_EPT_2MB | + MSR_VMX_EPT_1GB | MSR_VMX_EPT_INVEPT | + MSR_VMX_EPT_INVEPT_SINGLE_CONTEXT | MSR_VMX_EPT_INVEPT_ALL_CONTEXT | + MSR_VMX_EPT_INVVPID | MSR_VMX_EPT_INVVPID_SINGLE_ADDR | + MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT | MSR_VMX_EPT_INVVPID_ALL_CONTEXT | + MSR_VMX_EPT_INVVPID_SINGLE_CONTEXT_NOGLOBALS | MSR_VMX_EPT_AD_BITS, + .features[FEAT_VMX_EXIT_CTLS] = + VMX_VM_EXIT_ACK_INTR_ON_EXIT | VMX_VM_EXIT_SAVE_DEBUG_CONTROLS | + VMX_VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | + VMX_VM_EXIT_LOAD_IA32_PAT | VMX_VM_EXIT_LOAD_IA32_EFER | + VMX_VM_EXIT_SAVE_IA32_PAT | VMX_VM_EXIT_SAVE_IA32_EFER | + VMX_VM_EXIT_SAVE_VMX_PREEMPTION_TIMER, + .features[FEAT_VMX_MISC] = MSR_VMX_MISC_ACTIVITY_HLT | + MSR_VMX_MISC_STORE_LMA | MSR_VMX_MISC_VMWRITE_VMEXIT, + .features[FEAT_VMX_PINBASED_CTLS] = VMX_PIN_BASED_EXT_INTR_MASK | + VMX_PIN_BASED_NMI_EXITING | VMX_PIN_BASED_VIRTUAL_NMIS | + VMX_PIN_BASED_VMX_PREEMPTION_TIMER | VMX_PIN_BASED_POSTED_INTR, + .features[FEAT_VMX_PROCBASED_CTLS] = VMX_CPU_BASED_VIRTUAL_INTR_PENDING | + VMX_CPU_BASED_USE_TSC_OFFSETING | VMX_CPU_BASED_HLT_EXITING | + VMX_CPU_BASED_INVLPG_EXITING | VMX_CPU_BASED_MWAIT_EXITING | + VMX_CPU_BASED_RDPMC_EXITING | VMX_CPU_BASED_RDTSC_EXITING | + VMX_CPU_BASED_CR8_LOAD_EXITING | VMX_CPU_BASED_CR8_STORE_EXITING | + VMX_CPU_BASED_TPR_SHADOW | VMX_CPU_BASED_MOV_DR_EXITING | + VMX_CPU_BASED_UNCOND_IO_EXITING | VMX_CPU_BASED_USE_IO_BITMAPS | + VMX_CPU_BASED_MONITOR_EXITING | VMX_CPU_BASED_PAUSE_EXITING | + VMX_CPU_BASED_VIRTUAL_NMI_PENDING | VMX_CPU_BASED_USE_MSR_BITMAPS | + VMX_CPU_BASED_CR3_LOAD_EXITING | VMX_CPU_BASED_CR3_STORE_EXITING | + VMX_CPU_BASED_MONITOR_TRAP_FLAG | + VMX_CPU_BASED_ACTIVATE_SECONDARY_CONTROLS, + .features[FEAT_VMX_SECONDARY_CTLS] = + VMX_SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | + VMX_SECONDARY_EXEC_WBINVD_EXITING | VMX_SECONDARY_EXEC_ENABLE_EPT | + VMX_SECONDARY_EXEC_DESC | VMX_SECONDARY_EXEC_RDTSCP | + VMX_SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | + VMX_SECONDARY_EXEC_ENABLE_VPID | VMX_SECONDARY_EXEC_UNRESTRICTED_GUEST | + VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT | + VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | + VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID | + VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS | + VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML, + .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING, .xlevel = 0x80000008, .model_id = "Intel Xeon Processor (Cooperlake)", }, From ce25653dfb69a2c79c237dfa218029506284d41a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:19:56 +0100 Subject: [PATCH 24/38] hw/ipmi: Remove unnecessary declarations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since we don't use these methods before defining them, no need to forward-declare them. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Corey Minyard Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-2-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/ipmi/ipmi_bmc_extern.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c index 87da9ff99c..450926e5fb 100644 --- a/hw/ipmi/ipmi_bmc_extern.c +++ b/hw/ipmi/ipmi_bmc_extern.c @@ -87,10 +87,6 @@ typedef struct IPMIBmcExtern { bool send_reset; } IPMIBmcExtern; -static int can_receive(void *opaque); -static void receive(void *opaque, const uint8_t *buf, int size); -static void chr_event(void *opaque, int event); - static unsigned char ipmb_checksum(const unsigned char *data, int size, unsigned char start) { From 1d043b1ec03406442cea52680756ba19b1581f67 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:19:57 +0100 Subject: [PATCH 25/38] hw/ipmi: Explicit we ignore some QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: hw/ipmi/ipmi_bmc_extern.c: In function ‘chr_event’: hw/ipmi/ipmi_bmc_extern.c:389:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 389 | switch (event) { | ^~~~~~ hw/ipmi/ipmi_bmc_extern.c:389:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/ipmi/ipmi_bmc_extern.c:389:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Acked-by: Corey Minyard Reviewed-by: Marc-André Lureau Reviewed-by: Richard Henderson Message-Id: <20191218172009.8868-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/ipmi/ipmi_bmc_extern.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c index 450926e5fb..adf2afe728 100644 --- a/hw/ipmi/ipmi_bmc_extern.c +++ b/hw/ipmi/ipmi_bmc_extern.c @@ -435,6 +435,12 @@ static void chr_event(void *opaque, int event) k->handle_rsp(s, ibe->outbuf[0], ibe->inbuf + 1, 3); } break; + + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From 75c5bb0b72f1421234cb34e4361dc2f2e4601dc3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:19:58 +0100 Subject: [PATCH 26/38] hw/char/terminal3270: Explicit ignored QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC s390x-softmmu/hw/char/terminal3270.o hw/char/terminal3270.c: In function ‘chr_event’: hw/char/terminal3270.c:156:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 156 | switch (event) { | ^~~~~~ hw/char/terminal3270.c:156:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/char/terminal3270.c:156:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cornelia Huck Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-4-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/char/terminal3270.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/char/terminal3270.c b/hw/char/terminal3270.c index 6859c1bcb2..2aab04fd4b 100644 --- a/hw/char/terminal3270.c +++ b/hw/char/terminal3270.c @@ -166,6 +166,11 @@ static void chr_event(void *opaque, int event) sch->curr_status.scsw.dstat = SCSW_DSTAT_DEVICE_END; css_conditional_io_interrupt(sch); break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From c263158ed9a0cfe62a49a7415874a7ce69c3e6b2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:19:59 +0100 Subject: [PATCH 27/38] hw/usb/dev-serial: Explicit we ignore few QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: hw/usb/dev-serial.c: In function ‘usb_serial_event’: hw/usb/dev-serial.c:468:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] 468 | switch (event) { | ^~~~~~ hw/usb/dev-serial.c:468:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-5-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/usb/dev-serial.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index 45cc74128a..2ba6870b37 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -479,6 +479,10 @@ static void usb_serial_event(void *opaque, int event) usb_device_detach(&s->dev); } break; + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From acd51e41311f8a2c2dc16dfd66334d2eda4f80f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:00 +0100 Subject: [PATCH 28/38] hw/usb/redirect: Explicit we ignore few QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC hw/usb/redirect.o hw/usb/redirect.c: In function ‘usbredir_chardev_event’: hw/usb/redirect.c:1361:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 1361 | switch (event) { | ^~~~~~ hw/usb/redirect.c:1361:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/usb/redirect.c:1361:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-6-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/usb/redirect.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index e0f5ca6f81..ddc1a59cb4 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -1370,6 +1370,11 @@ static void usbredir_chardev_event(void *opaque, int event) DPRINTF("chardev close\n"); qemu_bh_schedule(dev->chardev_close_bh); break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From dfe8114aa4ac51bf67df81327ee50edad7d9a31f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:01 +0100 Subject: [PATCH 29/38] ccid-card-passthru: Explicit we ignore QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: hw/usb/ccid-card-passthru.c: In function ‘ccid_card_vscard_event’: hw/usb/ccid-card-passthru.c:314:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] 314 | switch (event) { | ^~~~~~ hw/usb/ccid-card-passthru.c:314:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] hw/usb/ccid-card-passthru.c:314:5: error: enumeration value ‘CHR_EVENT_CLOSED’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-7-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/usb/ccid-card-passthru.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c index 267ed9a8a0..e53696c07a 100644 --- a/hw/usb/ccid-card-passthru.c +++ b/hw/usb/ccid-card-passthru.c @@ -318,6 +318,11 @@ static void ccid_card_vscard_event(void *opaque, int event) case CHR_EVENT_OPENED: DPRINTF(card, D_INFO, "%s: CHR_EVENT_OPENED\n", __func__); break; + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + case CHR_EVENT_CLOSED: + /* Ignore */ + break; } } From 5b082922419f085d83548be40b30e840a562a68f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:02 +0100 Subject: [PATCH 30/38] vhost-user-crypto: Explicit we ignore some QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC backends/cryptodev-vhost-user.o backends/cryptodev-vhost-user.c: In function ‘cryptodev_vhost_user_event’: backends/cryptodev-vhost-user.c:163:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 163 | switch (event) { | ^~~~~~ backends/cryptodev-vhost-user.c:163:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] backends/cryptodev-vhost-user.c:163:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-8-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- backends/cryptodev-vhost-user.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index b344283940..f1b407955f 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -171,6 +171,11 @@ static void cryptodev_vhost_user_event(void *opaque, int event) b->ready = false; cryptodev_vhost_user_stop(queues, s); break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From d0ab676907fcd7f50bcf4074fb6b1478a02d109f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:03 +0100 Subject: [PATCH 31/38] vhost-user-net: Explicit we ignore few QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC net/vhost-user.o net/vhost-user.c: In function ‘net_vhost_user_event’: net/vhost-user.c:269:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 269 | switch (event) { | ^~~~~~ net/vhost-user.c:269:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] net/vhost-user.c:269:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Reviewed-by: Michael S. Tsirkin Message-Id: <20191218172009.8868-9-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- net/vhost-user.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/net/vhost-user.c b/net/vhost-user.c index 014199d600..c54c9c7d4c 100644 --- a/net/vhost-user.c +++ b/net/vhost-user.c @@ -294,6 +294,11 @@ static void net_vhost_user_event(void *opaque, int event) aio_bh_schedule_oneshot(ctx, chr_closed_bh, opaque); } break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } if (err) { From 669457f352a50baaae26c5e168e628e4f46e6170 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:04 +0100 Subject: [PATCH 32/38] vhost-user-blk: Explicit we ignore few QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC s390x-softmmu/hw/block/vhost-user-blk.o hw/block/vhost-user-blk.c: In function ‘vhost_user_blk_event’: hw/block/vhost-user-blk.c:370:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 370 | switch (event) { | ^~~~~~ hw/block/vhost-user-blk.c:370:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/block/vhost-user-blk.c:370:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Acked-by: Michael S. Tsirkin Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-10-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/block/vhost-user-blk.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index 63da9bb619..ccaf2ad978 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -383,6 +383,11 @@ static void vhost_user_blk_event(void *opaque, int event) s->watch = 0; } break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From 3042bd34136b718f1274c6d28c333ec1d0dd3803 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:05 +0100 Subject: [PATCH 33/38] virtio-console: Explicit we ignore some QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC hw/char/virtio-console.o hw/char/virtio-console.c: In function ‘chr_event’: hw/char/virtio-console.c:154:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 154 | switch (event) { | ^~~~~~ hw/char/virtio-console.c:154:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] hw/char/virtio-console.c:154:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Acked-by: Michael S. Tsirkin Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-11-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- hw/char/virtio-console.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c index c13649f1ef..cbb304d270 100644 --- a/hw/char/virtio-console.c +++ b/hw/char/virtio-console.c @@ -162,6 +162,11 @@ static void chr_event(void *opaque, int event) } virtio_serial_close(port); break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From ed7c5bb7ad384f5dd55945db57cae2ba5263a1e4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:06 +0100 Subject: [PATCH 34/38] monitor/qmp: Explicit we ignore few QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: CC monitor/qmp.o monitor/qmp.c: In function ‘monitor_qmp_event’: monitor/qmp.c:345:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 345 | switch (event) { | ^~~~~~ monitor/qmp.c:345:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] monitor/qmp.c:345:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Reviewed-by: Markus Armbruster Message-Id: <20191218172009.8868-12-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- monitor/qmp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/monitor/qmp.c b/monitor/qmp.c index b67a8e7d1f..6c46be40f8 100644 --- a/monitor/qmp.c +++ b/monitor/qmp.c @@ -365,6 +365,11 @@ static void monitor_qmp_event(void *opaque, int event) mon_refcount--; monitor_fdsets_cleanup(); break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } } From 4904ca6a7eb92d25cbb8b198203ab6173f744985 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:07 +0100 Subject: [PATCH 35/38] monitor/hmp: Explicit we ignore a QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit an event ignored by this frontend, to silent the following GCC warning: CC monitor/hmp.o monitor/hmp.c: In function ‘monitor_event’: monitor/hmp.c:1330:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 1330 | switch (event) { | ^~~~~~ cc1: all warnings being treated as errors Acked-by: Dr. David Alan Gilbert Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-13-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- monitor/hmp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/monitor/hmp.c b/monitor/hmp.c index 8942e28933..706ebe7074 100644 --- a/monitor/hmp.c +++ b/monitor/hmp.c @@ -1371,6 +1371,10 @@ static void monitor_event(void *opaque, int event) mon_refcount--; monitor_fdsets_cleanup(); break; + + case CHR_EVENT_BREAK: + /* Ignored */ + break; } } From 71f8d3b0e669b093309b435fda125ce7dcdcd19d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:08 +0100 Subject: [PATCH 36/38] chardev/char: Explicit we ignore some QEMUChrEvent in IOEventHandler MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. To be able to use this enum in the IOEventHandler typedef, we need to explicit all the events ignored by this frontend, to silent the following GCC warning: chardev/char.c: In function ‘qemu_chr_be_event’: chardev/char.c:65:5: error: enumeration value ‘CHR_EVENT_BREAK’ not handled in switch [-Werror=switch] 65 | switch (event) { | ^~~~~~ chardev/char.c:65:5: error: enumeration value ‘CHR_EVENT_MUX_IN’ not handled in switch [-Werror=switch] chardev/char.c:65:5: error: enumeration value ‘CHR_EVENT_MUX_OUT’ not handled in switch [-Werror=switch] cc1: all warnings being treated as errors Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-14-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- chardev/char.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/chardev/char.c b/chardev/char.c index 7b6b2cb123..739da1155b 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -69,6 +69,11 @@ void qemu_chr_be_event(Chardev *s, int event) case CHR_EVENT_CLOSED: s->be_open = 0; break; + case CHR_EVENT_BREAK: + case CHR_EVENT_MUX_IN: + case CHR_EVENT_MUX_OUT: + /* Ignore */ + break; } CHARDEV_GET_CLASS(s)->chr_be_event(s, event); From 2fa9044a4fe8c6c9c215785d1abce4db6063a6f9 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Wed, 8 Jan 2020 11:14:29 +0100 Subject: [PATCH 37/38] chardev: use QEMUChrEvent instead of int MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This uses the QEMUChrEvent enum everywhere except in IOEventHandler. The IOEventHandler change needs to happen at once for all front ends and is done with Coccinelle in the next patch. (Extracted from a patch by Philippe Mathieu-Daudé). Signed-off-by: Paolo Bonzini --- chardev/char-mux.c | 6 +++--- chardev/char.c | 4 ++-- include/chardev/char-mux.h | 2 +- include/chardev/char.h | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/chardev/char-mux.c b/chardev/char-mux.c index 200c62a0d0..2675ae0c0a 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -117,7 +117,7 @@ static void mux_print_help(Chardev *chr) } } -static void mux_chr_send_event(MuxChardev *d, int mux_nr, int event) +static void mux_chr_send_event(MuxChardev *d, int mux_nr, QEMUChrEvent event) { CharBackend *be = d->backends[mux_nr]; @@ -126,7 +126,7 @@ static void mux_chr_send_event(MuxChardev *d, int mux_nr, int event) } } -static void mux_chr_be_event(Chardev *chr, int event) +static void mux_chr_be_event(Chardev *chr, QEMUChrEvent event) { MuxChardev *d = MUX_CHARDEV(chr); @@ -232,7 +232,7 @@ static void mux_chr_read(void *opaque, const uint8_t *buf, int size) } } -void mux_chr_send_all_event(Chardev *chr, int event) +void mux_chr_send_all_event(Chardev *chr, QEMUChrEvent event) { MuxChardev *d = MUX_CHARDEV(chr); int i; diff --git a/chardev/char.c b/chardev/char.c index 739da1155b..4f598f8175 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -48,7 +48,7 @@ static Object *get_chardevs_root(void) return container_get(object_get_root(), "/chardevs"); } -static void chr_be_event(Chardev *s, int event) +static void chr_be_event(Chardev *s, QEMUChrEvent event) { CharBackend *be = s->be; @@ -59,7 +59,7 @@ static void chr_be_event(Chardev *s, int event) be->chr_event(be->opaque, event); } -void qemu_chr_be_event(Chardev *s, int event) +void qemu_chr_be_event(Chardev *s, QEMUChrEvent event) { /* Keep track if the char device is open */ switch (event) { diff --git a/include/chardev/char-mux.h b/include/chardev/char-mux.h index 572cefd517..417fe32eed 100644 --- a/include/chardev/char-mux.h +++ b/include/chardev/char-mux.h @@ -56,6 +56,6 @@ typedef struct MuxChardev { object_dynamic_cast(OBJECT(chr), TYPE_CHARDEV_MUX) void mux_set_focus(Chardev *chr, int focus); -void mux_chr_send_all_event(Chardev *chr, int event); +void mux_chr_send_all_event(Chardev *chr, QEMUChrEvent event); #endif /* CHAR_MUX_H */ diff --git a/include/chardev/char.h b/include/chardev/char.h index 087b202b62..00589a6025 100644 --- a/include/chardev/char.h +++ b/include/chardev/char.h @@ -210,7 +210,7 @@ void qemu_chr_be_update_read_handlers(Chardev *s, * * Send an event from the back end to the front end. */ -void qemu_chr_be_event(Chardev *s, int event); +void qemu_chr_be_event(Chardev *s, QEMUChrEvent event); int qemu_chr_add_client(Chardev *s, int fd); Chardev *qemu_chr_find(const char *name); @@ -273,7 +273,7 @@ typedef struct ChardevClass { void (*chr_accept_input)(Chardev *chr); void (*chr_set_echo)(Chardev *chr, bool echo); void (*chr_set_fe_open)(Chardev *chr, int fe_open); - void (*chr_be_event)(Chardev *s, int event); + void (*chr_be_event)(Chardev *s, QEMUChrEvent event); /* Return 0 if succeeded, 1 if failed */ int (*chr_machine_done)(Chardev *chr); } ChardevClass; From 083b266f69f36195aef22cb224f86b99ca0d6feb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 18 Dec 2019 18:20:09 +0100 Subject: [PATCH 38/38] chardev: Use QEMUChrEvent enum in IOEventHandler typedef MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Chardev events are listed in the QEMUChrEvent enum. By using the enum in the IOEventHandler typedef we: - make the IOEventHandler type more explicit (this handler process out-of-band information, while the IOReadHandler is in-band), - help static code analyzers. This patch was produced with the following spatch script: @match@ expression backend, opaque, context, set_open; identifier fd_can_read, fd_read, fd_event, be_change; @@ qemu_chr_fe_set_handlers(backend, fd_can_read, fd_read, fd_event, be_change, opaque, context, set_open); @depends on match@ identifier opaque, event; identifier match.fd_event; @@ static -void fd_event(void *opaque, int event) +void fd_event(void *opaque, QEMUChrEvent event) { ... } Then the typedef was modified manually in include/chardev/char-fe.h. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Corey Minyard Acked-by: Cornelia Huck Reviewed-by: Marc-André Lureau Message-Id: <20191218172009.8868-15-philmd@redhat.com> Signed-off-by: Paolo Bonzini --- backends/cryptodev-vhost-user.c | 2 +- chardev/char-mux.c | 2 +- gdbstub.c | 2 +- hw/arm/pxa2xx.c | 2 +- hw/arm/strongarm.c | 2 +- hw/block/vhost-user-blk.c | 2 +- hw/char/cadence_uart.c | 2 +- hw/char/digic-uart.c | 2 +- hw/char/escc.c | 2 +- hw/char/etraxfs_ser.c | 2 +- hw/char/exynos4210_uart.c | 2 +- hw/char/grlib_apbuart.c | 2 +- hw/char/imx_serial.c | 2 +- hw/char/ipoctal232.c | 2 +- hw/char/lm32_juart.c | 2 +- hw/char/lm32_uart.c | 2 +- hw/char/mcf_uart.c | 2 +- hw/char/milkymist-uart.c | 2 +- hw/char/nrf51_uart.c | 2 +- hw/char/pl011.c | 2 +- hw/char/serial.c | 2 +- hw/char/sh_serial.c | 2 +- hw/char/terminal3270.c | 2 +- hw/char/virtio-console.c | 2 +- hw/char/xilinx_uartlite.c | 2 +- hw/ipmi/ipmi_bmc_extern.c | 2 +- hw/mips/boston.c | 2 +- hw/mips/mips_malta.c | 2 +- hw/riscv/riscv_htif.c | 2 +- hw/riscv/sifive_uart.c | 2 +- hw/usb/ccid-card-passthru.c | 2 +- hw/usb/dev-serial.c | 2 +- hw/usb/redirect.c | 2 +- include/chardev/char-fe.h | 2 +- monitor/hmp.c | 2 +- monitor/qmp.c | 2 +- net/filter-mirror.c | 2 +- net/vhost-user.c | 4 ++-- qtest.c | 2 +- tests/test-char.c | 6 +++--- tests/vhost-user-test.c | 2 +- 41 files changed, 44 insertions(+), 44 deletions(-) diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index f1b407955f..6edada8e9e 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -152,7 +152,7 @@ cryptodev_vhost_claim_chardev(CryptoDevBackendVhostUser *s, return chr; } -static void cryptodev_vhost_user_event(void *opaque, int event) +static void cryptodev_vhost_user_event(void *opaque, QEMUChrEvent event) { CryptoDevBackendVhostUser *s = opaque; CryptoDevBackend *b = CRYPTODEV_BACKEND(s); diff --git a/chardev/char-mux.c b/chardev/char-mux.c index 2675ae0c0a..46c44af67c 100644 --- a/chardev/char-mux.c +++ b/chardev/char-mux.c @@ -247,7 +247,7 @@ void mux_chr_send_all_event(Chardev *chr, QEMUChrEvent event) } } -static void mux_chr_event(void *opaque, int event) +static void mux_chr_event(void *opaque, QEMUChrEvent event) { mux_chr_send_all_event(CHARDEV(opaque), event); } diff --git a/gdbstub.c b/gdbstub.c index 4cf8af365e..ce304ff482 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -3171,7 +3171,7 @@ static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) } } -static void gdb_chr_event(void *opaque, int event) +static void gdb_chr_event(void *opaque, QEMUChrEvent event) { int i; GDBState *s = (GDBState *) opaque; diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index cdafde2f76..950ff4239a 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1955,7 +1955,7 @@ static void pxa2xx_fir_rx(void *opaque, const uint8_t *buf, int size) pxa2xx_fir_update(s); } -static void pxa2xx_fir_event(void *opaque, int event) +static void pxa2xx_fir_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 6bee034914..c6776e8479 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -1093,7 +1093,7 @@ static void strongarm_uart_receive(void *opaque, const uint8_t *buf, int size) strongarm_uart_update_int_status(s); } -static void strongarm_uart_event(void *opaque, int event) +static void strongarm_uart_event(void *opaque, QEMUChrEvent event) { StrongARMUARTState *s = opaque; if (event == CHR_EVENT_BREAK) { diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index ccaf2ad978..98b383f90e 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -361,7 +361,7 @@ static gboolean vhost_user_blk_watch(GIOChannel *chan, GIOCondition cond, return true; } -static void vhost_user_blk_event(void *opaque, int event) +static void vhost_user_blk_event(void *opaque, QEMUChrEvent event) { DeviceState *dev = opaque; VirtIODevice *vdev = VIRTIO_DEVICE(dev); diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 0e315b2376..51791bd217 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -348,7 +348,7 @@ static void uart_receive(void *opaque, const uint8_t *buf, int size) } } -static void uart_event(void *opaque, int event) +static void uart_event(void *opaque, QEMUChrEvent event) { CadenceUARTState *s = opaque; uint8_t buf = '\0'; diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c index 974a2619dd..033eba0a6a 100644 --- a/hw/char/digic-uart.c +++ b/hw/char/digic-uart.c @@ -131,7 +131,7 @@ static void uart_rx(void *opaque, const uint8_t *buf, int size) s->reg_rx = *buf; } -static void uart_event(void *opaque, int event) +static void uart_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/char/escc.c b/hw/char/escc.c index 8f7bf322cb..c40c1d28f1 100644 --- a/hw/char/escc.c +++ b/hw/char/escc.c @@ -634,7 +634,7 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size) serial_receive_byte(s, buf[0]); } -static void serial_event(void *opaque, int event) +static void serial_event(void *opaque, QEMUChrEvent event) { ESCCChannelState *s = opaque; if (event == CHR_EVENT_BREAK) diff --git a/hw/char/etraxfs_ser.c b/hw/char/etraxfs_ser.c index 15ac12ef22..f34f767c60 100644 --- a/hw/char/etraxfs_ser.c +++ b/hw/char/etraxfs_ser.c @@ -202,7 +202,7 @@ static int serial_can_receive(void *opaque) return sizeof(s->rx_fifo) - s->rx_fifo_len; } -static void serial_event(void *opaque, int event) +static void serial_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c index d6b6b62366..7e5c5ce789 100644 --- a/hw/char/exynos4210_uart.c +++ b/hw/char/exynos4210_uart.c @@ -528,7 +528,7 @@ static void exynos4210_uart_receive(void *opaque, const uint8_t *buf, int size) } -static void exynos4210_uart_event(void *opaque, int event) +static void exynos4210_uart_event(void *opaque, QEMUChrEvent event) { Exynos4210UartState *s = (Exynos4210UartState *)opaque; diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c index fe3cbf41a3..8e59c3bc6e 100644 --- a/hw/char/grlib_apbuart.c +++ b/hw/char/grlib_apbuart.c @@ -155,7 +155,7 @@ static void grlib_apbuart_receive(void *opaque, const uint8_t *buf, int size) } } -static void grlib_apbuart_event(void *opaque, int event) +static void grlib_apbuart_event(void *opaque, QEMUChrEvent event) { trace_grlib_apbuart_event(event); } diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c index fddde9b43d..d09c210709 100644 --- a/hw/char/imx_serial.c +++ b/hw/char/imx_serial.c @@ -323,7 +323,7 @@ static void imx_receive(void *opaque, const uint8_t *buf, int size) imx_put_data(opaque, *buf); } -static void imx_event(void *opaque, int event) +static void imx_event(void *opaque, QEMUChrEvent event) { if (event == CHR_EVENT_BREAK) { imx_put_data(opaque, URXD_BRK | URXD_FRMERR | URXD_ERR); diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c index 66c163ba26..80e9dff701 100644 --- a/hw/char/ipoctal232.c +++ b/hw/char/ipoctal232.c @@ -503,7 +503,7 @@ static void hostdev_receive(void *opaque, const uint8_t *buf, int size) } } -static void hostdev_event(void *opaque, int event) +static void hostdev_event(void *opaque, QEMUChrEvent event) { SCC2698Channel *ch = opaque; switch (event) { diff --git a/hw/char/lm32_juart.c b/hw/char/lm32_juart.c index e0b1bd6555..da9dd5668b 100644 --- a/hw/char/lm32_juart.c +++ b/hw/char/lm32_juart.c @@ -104,7 +104,7 @@ static int juart_can_rx(void *opaque) return !(s->jrx & JRX_FULL); } -static void juart_event(void *opaque, int event) +static void juart_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/char/lm32_uart.c b/hw/char/lm32_uart.c index 32f29c44cf..8d7a475c91 100644 --- a/hw/char/lm32_uart.c +++ b/hw/char/lm32_uart.c @@ -235,7 +235,7 @@ static int uart_can_rx(void *opaque) return !(s->regs[R_LSR] & LSR_DR); } -static void uart_event(void *opaque, int event) +static void uart_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c index 58323baf43..2de3680b5d 100644 --- a/hw/char/mcf_uart.c +++ b/hw/char/mcf_uart.c @@ -256,7 +256,7 @@ static void mcf_uart_push_byte(mcf_uart_state *s, uint8_t data) mcf_uart_update(s); } -static void mcf_uart_event(void *opaque, int event) +static void mcf_uart_event(void *opaque, QEMUChrEvent event) { mcf_uart_state *s = (mcf_uart_state *)opaque; diff --git a/hw/char/milkymist-uart.c b/hw/char/milkymist-uart.c index c358ca07f3..1c7b61480e 100644 --- a/hw/char/milkymist-uart.c +++ b/hw/char/milkymist-uart.c @@ -180,7 +180,7 @@ static int uart_can_rx(void *opaque) return !(s->regs[R_STAT] & STAT_RX_EVT); } -static void uart_event(void *opaque, int event) +static void uart_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/char/nrf51_uart.c b/hw/char/nrf51_uart.c index 2777afe366..b67fd21089 100644 --- a/hw/char/nrf51_uart.c +++ b/hw/char/nrf51_uart.c @@ -245,7 +245,7 @@ static int uart_can_receive(void *opaque) return s->rx_started ? (UART_FIFO_LENGTH - s->rx_fifo_len) : 0; } -static void uart_event(void *opaque, int event) +static void uart_event(void *opaque, QEMUChrEvent event) { NRF51UARTState *s = NRF51_UART(opaque); diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 84ad8ff9fb..23cd544cc5 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -280,7 +280,7 @@ static void pl011_receive(void *opaque, const uint8_t *buf, int size) pl011_put_fifo(opaque, *buf); } -static void pl011_event(void *opaque, int event) +static void pl011_event(void *opaque, QEMUChrEvent event) { if (event == CHR_EVENT_BREAK) pl011_put_fifo(opaque, 0x400); diff --git a/hw/char/serial.c b/hw/char/serial.c index b4aa250950..992b5ee944 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -634,7 +634,7 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size) serial_update_irq(s); } -static void serial_event(void *opaque, int event) +static void serial_event(void *opaque, QEMUChrEvent event) { SerialState *s = opaque; DPRINTF("event %x\n", event); diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c index 07dc16be13..167f4d8cb9 100644 --- a/hw/char/sh_serial.c +++ b/hw/char/sh_serial.c @@ -358,7 +358,7 @@ static void sh_serial_receive1(void *opaque, const uint8_t *buf, int size) } } -static void sh_serial_event(void *opaque, int event) +static void sh_serial_event(void *opaque, QEMUChrEvent event) { sh_serial_state *s = opaque; if (event == CHR_EVENT_BREAK) diff --git a/hw/char/terminal3270.c b/hw/char/terminal3270.c index 2aab04fd4b..f7aba12565 100644 --- a/hw/char/terminal3270.c +++ b/hw/char/terminal3270.c @@ -142,7 +142,7 @@ static void terminal_read(void *opaque, const uint8_t *buf, int size) } } -static void chr_event(void *opaque, int event) +static void chr_event(void *opaque, QEMUChrEvent event) { Terminal3270 *t = opaque; CcwDevice *ccw_dev = CCW_DEVICE(t); diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c index cbb304d270..a7d34fe0ed 100644 --- a/hw/char/virtio-console.c +++ b/hw/char/virtio-console.c @@ -145,7 +145,7 @@ static void chr_read(void *opaque, const uint8_t *buf, int size) virtio_serial_write(port, buf, size); } -static void chr_event(void *opaque, int event) +static void chr_event(void *opaque, QEMUChrEvent event) { VirtConsole *vcon = opaque; VirtIOSerialPort *port = VIRTIO_SERIAL_PORT(vcon); diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index 2c47275068..aa6bf02e21 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -206,7 +206,7 @@ static int uart_can_rx(void *opaque) return s->rx_fifo_len < sizeof(s->rx_fifo); } -static void uart_event(void *opaque, int event) +static void uart_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c index adf2afe728..16a4117ab0 100644 --- a/hw/ipmi/ipmi_bmc_extern.c +++ b/hw/ipmi/ipmi_bmc_extern.c @@ -379,7 +379,7 @@ static void receive(void *opaque, const uint8_t *buf, int size) handle_hw_op(ibe, hw_op); } -static void chr_event(void *opaque, int event) +static void chr_event(void *opaque, QEMUChrEvent event) { IPMIBmcExtern *ibe = opaque; IPMIInterface *s = ibe->parent.intf; diff --git a/hw/mips/boston.c b/hw/mips/boston.c index ca7d813a52..29b476b4bd 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -98,7 +98,7 @@ enum boston_plat_reg { PLAT_SYS_CTL = 0x48, }; -static void boston_lcd_event(void *opaque, int event) +static void boston_lcd_event(void *opaque, QEMUChrEvent event) { BostonState *s = opaque; if (event == CHR_EVENT_OPENED && !s->lcd_inited) { diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 783cd99848..72c03baa8e 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -545,7 +545,7 @@ static void malta_fpga_reset(void *opaque) snprintf(s->display_text, 9, " "); } -static void malta_fgpa_display_event(void *opaque, int event) +static void malta_fgpa_display_event(void *opaque, QEMUChrEvent event) { MaltaFPGAState *s = opaque; diff --git a/hw/riscv/riscv_htif.c b/hw/riscv/riscv_htif.c index 4f7b11dc37..ca87a5cf9f 100644 --- a/hw/riscv/riscv_htif.c +++ b/hw/riscv/riscv_htif.c @@ -96,7 +96,7 @@ static void htif_recv(void *opaque, const uint8_t *buf, int size) * Called by the char dev to supply special events to the HTIF console. * Not used for HTIF. */ -static void htif_event(void *opaque, int event) +static void htif_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/riscv/sifive_uart.c b/hw/riscv/sifive_uart.c index a403ae90f5..9350482662 100644 --- a/hw/riscv/sifive_uart.c +++ b/hw/riscv/sifive_uart.c @@ -162,7 +162,7 @@ static int uart_can_rx(void *opaque) return s->rx_fifo_len < sizeof(s->rx_fifo); } -static void uart_event(void *opaque, int event) +static void uart_event(void *opaque, QEMUChrEvent event) { } diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c index e53696c07a..3d40b700db 100644 --- a/hw/usb/ccid-card-passthru.c +++ b/hw/usb/ccid-card-passthru.c @@ -307,7 +307,7 @@ static void ccid_card_vscard_read(void *opaque, const uint8_t *buf, int size) } } -static void ccid_card_vscard_event(void *opaque, int event) +static void ccid_card_vscard_event(void *opaque, QEMUChrEvent event) { PassthruState *card = opaque; diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c index 2ba6870b37..9646fe77da 100644 --- a/hw/usb/dev-serial.c +++ b/hw/usb/dev-serial.c @@ -461,7 +461,7 @@ static void usb_serial_read(void *opaque, const uint8_t *buf, int size) s->recv_used += size; } -static void usb_serial_event(void *opaque, int event) +static void usb_serial_event(void *opaque, QEMUChrEvent event) { USBSerialState *s = opaque; diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index ddc1a59cb4..0068aa8a19 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -1354,7 +1354,7 @@ static void usbredir_chardev_read(void *opaque, const uint8_t *buf, int size) usbredirparser_do_write(dev->parser); } -static void usbredir_chardev_event(void *opaque, int event) +static void usbredir_chardev_event(void *opaque, QEMUChrEvent event) { USBRedirDevice *dev = opaque; diff --git a/include/chardev/char-fe.h b/include/chardev/char-fe.h index 67601dc9a4..a553843364 100644 --- a/include/chardev/char-fe.h +++ b/include/chardev/char-fe.h @@ -4,7 +4,7 @@ #include "chardev/char.h" #include "qemu/main-loop.h" -typedef void IOEventHandler(void *opaque, int event); +typedef void IOEventHandler(void *opaque, QEMUChrEvent event); typedef int BackendChangeHandler(void *opaque); /* This is the backend as seen by frontend, the actual backend is diff --git a/monitor/hmp.c b/monitor/hmp.c index 706ebe7074..944fa9651e 100644 --- a/monitor/hmp.c +++ b/monitor/hmp.c @@ -1322,7 +1322,7 @@ static void monitor_read(void *opaque, const uint8_t *buf, int size) cur_mon = old_mon; } -static void monitor_event(void *opaque, int event) +static void monitor_event(void *opaque, QEMUChrEvent event) { Monitor *mon = opaque; MonitorHMP *hmp_mon = container_of(mon, MonitorHMP, common); diff --git a/monitor/qmp.c b/monitor/qmp.c index 6c46be40f8..54c06ba824 100644 --- a/monitor/qmp.c +++ b/monitor/qmp.c @@ -337,7 +337,7 @@ static QDict *qmp_greeting(MonitorQMP *mon) ver, cap_list); } -static void monitor_qmp_event(void *opaque, int event) +static void monitor_qmp_event(void *opaque, QEMUChrEvent event) { QDict *data; MonitorQMP *mon = opaque; diff --git a/net/filter-mirror.c b/net/filter-mirror.c index 8d36009c53..d83e815545 100644 --- a/net/filter-mirror.c +++ b/net/filter-mirror.c @@ -132,7 +132,7 @@ static void redirector_chr_read(void *opaque, const uint8_t *buf, int size) } } -static void redirector_chr_event(void *opaque, int event) +static void redirector_chr_event(void *opaque, QEMUChrEvent event) { NetFilterState *nf = opaque; MirrorState *s = FILTER_REDIRECTOR(nf); diff --git a/net/vhost-user.c b/net/vhost-user.c index c54c9c7d4c..17532daaf3 100644 --- a/net/vhost-user.c +++ b/net/vhost-user.c @@ -218,7 +218,7 @@ static gboolean net_vhost_user_watch(GIOChannel *chan, GIOCondition cond, return TRUE; } -static void net_vhost_user_event(void *opaque, int event); +static void net_vhost_user_event(void *opaque, QEMUChrEvent event); static void chr_closed_bh(void *opaque) { @@ -249,7 +249,7 @@ static void chr_closed_bh(void *opaque) } } -static void net_vhost_user_event(void *opaque, int event) +static void net_vhost_user_event(void *opaque, QEMUChrEvent event) { const char *name = opaque; NetClientState *ncs[MAX_QUEUE_NUM]; diff --git a/qtest.c b/qtest.c index 8b50e2783e..12432f99cf 100644 --- a/qtest.c +++ b/qtest.c @@ -722,7 +722,7 @@ static int qtest_can_read(void *opaque) return 1024; } -static void qtest_event(void *opaque, int event) +static void qtest_event(void *opaque, QEMUChrEvent event) { int i; diff --git a/tests/test-char.c b/tests/test-char.c index 45e42af290..3afc9b1b8d 100644 --- a/tests/test-char.c +++ b/tests/test-char.c @@ -54,7 +54,7 @@ static void fe_read(void *opaque, const uint8_t *buf, int size) quit = true; } -static void fe_event(void *opaque, int event) +static void fe_event(void *opaque, QEMUChrEvent event) { FeHandler *h = opaque; bool new_open_state; @@ -633,7 +633,7 @@ typedef struct { static void -char_socket_event(void *opaque, int event) +char_socket_event(void *opaque, QEMUChrEvent event) { CharSocketTestData *data = opaque; data->event = event; @@ -1006,7 +1006,7 @@ static void char_socket_client_test(gconstpointer opaque) } static void -count_closed_event(void *opaque, int event) +count_closed_event(void *opaque, QEMUChrEvent event) { int *count = opaque; if (event == CHR_EVENT_CLOSED) { diff --git a/tests/vhost-user-test.c b/tests/vhost-user-test.c index 91ea373ba5..2324b964ad 100644 --- a/tests/vhost-user-test.c +++ b/tests/vhost-user-test.c @@ -499,7 +499,7 @@ static TestServer *test_server_new(const gchar *name) return server; } -static void chr_event(void *opaque, int event) +static void chr_event(void *opaque, QEMUChrEvent event) { TestServer *s = opaque;