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tcg/s390x: Use constant pool for prologue

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Rather than have separate code only used for guest_base,
rely on a recent change to handle constant pool entries.

Cc: qemu-s390x@nongnu.org
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2017-10-25 18:03:27 +02:00
parent 5b38ee3161
commit ba2c747992
1 changed files with 12 additions and 32 deletions
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44
tcg/s390/tcg-target.inc.c
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@ -555,9 +555,6 @@ static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src)
static const S390Opcode lli_insns[4] = { static const S390Opcode lli_insns[4] = {
RI_LLILL, RI_LLILH, RI_LLIHL, RI_LLIHH RI_LLILL, RI_LLILH, RI_LLIHL, RI_LLIHH
}; };
static const S390Opcode ii_insns[4] = {
RI_IILL, RI_IILH, RI_IIHL, RI_IIHH
};
static bool maybe_out_small_movi(TCGContext *s, TCGType type, static bool maybe_out_small_movi(TCGContext *s, TCGType type,
TCGReg ret, tcg_target_long sval) TCGReg ret, tcg_target_long sval)
@ -647,36 +644,19 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret,
return; return;
} }
/* When allowed, stuff it in the constant pool. */ /* Otherwise, stuff it in the constant pool. */
if (!in_prologue) { if (s390_facilities & FACILITY_GEN_INST_EXT) {
if (USE_REG_TB) { tcg_out_insn(s, RIL, LGRL, ret, 0);
tcg_out_insn(s, RXY, LG, ret, TCG_REG_TB, TCG_REG_NONE, 0); new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2);
new_pool_label(s, sval, R_390_20, s->code_ptr - 2, } else if (USE_REG_TB && !in_prologue) {
-(intptr_t)s->code_gen_ptr); tcg_out_insn(s, RXY, LG, ret, TCG_REG_TB, TCG_REG_NONE, 0);
} else { new_pool_label(s, sval, R_390_20, s->code_ptr - 2,
tcg_out_insn(s, RIL, LGRL, ret, 0); -(intptr_t)s->code_gen_ptr);
new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2);
}
return;
}
/* What's left is for the prologue, loading GUEST_BASE, and because
it failed to match above, is known to be a full 64-bit quantity.
We could try more than this, but it probably wouldn't pay off. */
if (s390_facilities & FACILITY_EXT_IMM) {
tcg_out_insn(s, RIL, LLILF, ret, uval);
tcg_out_insn(s, RIL, IIHF, ret, uval >> 32);
} else { } else {
const S390Opcode *insns = lli_insns; TCGReg base = ret ? ret : TCG_TMP0;
int i; tcg_out_insn(s, RIL, LARL, base, 0);
new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2);
for (i = 0; i < 4; i++) { tcg_out_insn(s, RXY, LG, ret, base, TCG_REG_NONE, 0);
uint16_t part = uval >> (16 * i);
if (part) {
tcg_out_insn_RI(s, insns[i], ret, part);
insns = ii_insns;
}
}
} }
} }