virtio-gpu: hostmem
Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com> Tested-by: Alyssa Ross <hi@alyssa.is> Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Tested-by: Huang Rui <ray.huang@amd.com> Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
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@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
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DeviceState *vdev = DEVICE(g);
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DeviceState *vdev = DEVICE(g);
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int i;
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int i;
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if (virtio_gpu_hostmem_enabled(g->conf)) {
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vpci_dev->msix_bar_idx = 1;
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vpci_dev->modern_mem_bar_idx = 2;
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memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
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g->conf.hostmem);
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pci_register_bar(&vpci_dev->pci_dev, 4,
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PCI_BASE_ADDRESS_SPACE_MEMORY |
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PCI_BASE_ADDRESS_MEM_PREFETCH |
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PCI_BASE_ADDRESS_MEM_TYPE_64,
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&g->hostmem);
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virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem,
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VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
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}
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virtio_pci_force_virtio_1(vpci_dev);
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virtio_pci_force_virtio_1(vpci_dev);
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if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
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if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) {
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return;
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return;
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@ -1511,6 +1511,7 @@ static Property virtio_gpu_properties[] = {
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256 * MiB),
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256 * MiB),
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DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
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DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
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VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
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VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
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DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
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pci_register_bar(&vpci_dev->pci_dev, 0,
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pci_register_bar(&vpci_dev->pci_dev, 0,
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PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
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PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
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/*
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* Configure virtio bar and regions
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*
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* We use bar #2 for the mmio regions, to be compatible with stdvga.
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* virtio regions are moved to the end of bar #2, to make room for
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* the stdvga mmio registers at the start of bar #2.
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*/
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vpci_dev->modern_mem_bar_idx = 2;
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vpci_dev->msix_bar_idx = 4;
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vpci_dev->modern_io_bar_idx = 5;
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vpci_dev->modern_io_bar_idx = 5;
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if (!virtio_gpu_hostmem_enabled(g->conf)) {
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/*
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* Configure virtio bar and regions
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*
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* We use bar #2 for the mmio regions, to be compatible with stdvga.
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* virtio regions are moved to the end of bar #2, to make room for
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* the stdvga mmio registers at the start of bar #2.
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*/
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vpci_dev->modern_mem_bar_idx = 2;
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vpci_dev->msix_bar_idx = 4;
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} else {
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vpci_dev->msix_bar_idx = 1;
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vpci_dev->modern_mem_bar_idx = 2;
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memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem",
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g->conf.hostmem);
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pci_register_bar(&vpci_dev->pci_dev, 4,
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PCI_BASE_ADDRESS_SPACE_MEMORY |
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PCI_BASE_ADDRESS_MEM_PREFETCH |
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PCI_BASE_ADDRESS_MEM_TYPE_64,
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&g->hostmem);
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virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem,
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VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
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}
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if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
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if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
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/*
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/*
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* with page-per-vq=off there is no padding space we can use
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* with page-per-vq=off there is no padding space we can use
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@ -108,12 +108,15 @@ enum virtio_gpu_base_conf_flags {
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(_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED))
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(_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED))
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#define virtio_gpu_context_init_enabled(_cfg) \
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#define virtio_gpu_context_init_enabled(_cfg) \
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(_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED))
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(_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED))
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#define virtio_gpu_hostmem_enabled(_cfg) \
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(_cfg.hostmem > 0)
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struct virtio_gpu_base_conf {
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struct virtio_gpu_base_conf {
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uint32_t max_outputs;
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uint32_t max_outputs;
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uint32_t flags;
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uint32_t flags;
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uint32_t xres;
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uint32_t xres;
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uint32_t yres;
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uint32_t yres;
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uint64_t hostmem;
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};
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};
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struct virtio_gpu_ctrl_command {
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struct virtio_gpu_ctrl_command {
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@ -137,6 +140,8 @@ struct VirtIOGPUBase {
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int renderer_blocked;
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int renderer_blocked;
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int enable;
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int enable;
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MemoryRegion hostmem;
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struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
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struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
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int enabled_output_bitmask;
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int enabled_output_bitmask;
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