target: e2k: Add cpu state is_jmp.
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3cc618ce20
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@ -34,6 +34,7 @@ typedef struct CPUArchState {
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unsigned int rcur; // based regs current index (* 2)
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unsigned int psz; // pred regs window size
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unsigned int is_jmp;
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/* control registers */
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target_ulong ctprs[3]; // Control Transfer Preparation Register (CTPR)
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@ -14,6 +14,7 @@ static TCGv_ptr cpu_win_ptr;
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static TCGv_i64 cpu_wregs[WREGS_SIZE];
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static TCGv_i64 cpu_gregs[32];
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static TCGv cpu_pc;
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static TCGv_i32 cpu_is_jmp;
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static TCGv_i64 cpu_pregs;
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static TCGv cpu_ctprs[3];
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static TCGv_i32 cpu_wbs;
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@ -390,6 +391,16 @@ static inline void gen_wrap_i32(TCGv_i32 ret, TCGv_i32 x, TCGv_i32 y)
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tcg_temp_free_i32(t0);
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}
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static inline void reset_is_jmp()
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{
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tcg_gen_movi_i32(cpu_is_jmp, 0);
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}
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static inline void set_is_jmp()
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{
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tcg_gen_movi_i32(cpu_is_jmp, 1);
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}
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static inline void gen_rcur_move()
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{
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TCGv_i32 tmp = tcg_temp_new_i32();
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@ -701,6 +712,8 @@ static void gen_cs0(DisasContext *dc, CPUE2KState *env)
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int sdisp = ((int) (disp << 4)) >> 1;
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target_ulong tgt = dc->pc + sdisp;
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TCGv dest = tcg_const_i64(tgt);
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// TODO: temporary, need to move in ctcond evaluate
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set_is_jmp();
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dc->jmp.dest = dest;
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dc->jmp.cond = cond;
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}
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@ -1172,13 +1185,15 @@ static void gen_jmp(DisasContext *dc, target_ulong next_pc)
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// TODO: temporary only preg cond
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if (cond_type == 2) {
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TCGv_i64 preg = get_preg(dc, psrc);
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TCGv_i64 cond = tcg_const_i64(1);
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TCGv next = tcg_const_tl(next_pc);
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dc->base.is_jmp = DISAS_NORETURN;
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tcg_gen_movcond_i64(TCG_COND_EQ, cpu_pc,
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preg, tcg_const_i64(1),
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preg, cond,
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dc->jmp.dest, next
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);
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tcg_gen_exit_tb(NULL, 0);
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tcg_temp_free(cond);
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}
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/* These types of conditions involve a (probably negated) predicate
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@ -1274,6 +1289,8 @@ static target_ulong disas_e2k_insn(DisasContext *dc, CPUState *cs)
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unsigned int i;
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target_ulong pc_next = unpack_instr(env, dc, dc->pc, instr);
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reset_is_jmp();
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if (dc->instr.cs0_present) {
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gen_cs0(dc, env);
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}
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@ -1324,17 +1341,19 @@ static target_ulong disas_e2k_insn(DisasContext *dc, CPUState *cs)
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// FIXME: not working in cond branches
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// Change windowing registers
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if (dc->jmp.cond == COND_NEVER) {
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// move based if not branch
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if (abn >> 1 != 0) {
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gen_rcur_move();
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}
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// TODO: handle any branch
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} else if (dc->jmp.cond != COND_NEVER) {
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// move based if branch
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if (abn & 0x1 != 0) {
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gen_rcur_move();
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}
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TCGv_i32 t0 = tcg_temp_new_i32();
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TCGv_i32 t1 = tcg_temp_new_i32();
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TCGv_i32 zero = tcg_const_i32(0);
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tcg_gen_addi_i32(t0, cpu_rcur, 2);
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gen_wrap_i32(t1, t0, cpu_rsz);
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tcg_gen_movcond_i32(TCG_COND_EQ, cpu_rcur, cpu_is_jmp, zero, t1, cpu_rcur);
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tcg_temp_free_i32(zero);
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tcg_temp_free_i32(t1);
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tcg_temp_free_i32(t0);
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}
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// TODO: move based if branch
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// Control transfer
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if (env->interrupt_index != 0) {
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@ -1466,11 +1485,11 @@ void e2k_tcg_initialize(void) {
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(r32); i++) {
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*r32[i].ptr = tcg_global_mem_new(cpu_env, r32[i].off, r32[i].name);
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*r32[i].ptr = tcg_global_mem_new_i32(cpu_env, r32[i].off, r32[i].name);
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}
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for (i = 0; i < ARRAY_SIZE(r64); i++) {
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*r64[i].ptr = tcg_global_mem_new(cpu_env, r64[i].off, r64[i].name);
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*r64[i].ptr = tcg_global_mem_new_i64(cpu_env, r64[i].off, r64[i].name);
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}
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for (i = 0; i < ARRAY_SIZE(rtl); i++) {
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@ -1478,11 +1497,12 @@ void e2k_tcg_initialize(void) {
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}
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cpu_win_ptr = tcg_global_mem_new_ptr(cpu_env, offsetof(CPUE2KState, win_ptr), "win_ptr");
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cpu_is_jmp = tcg_global_mem_new_i32(cpu_env, offsetof(CPUE2KState, is_jmp), "is_jmp");
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for (i = 0; i < WREGS_SIZE; i++) {
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snprintf(buf, ARRAY_SIZE(buf), "%%r%d", i);
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cpu_wregs[i] = tcg_global_mem_new(cpu_win_ptr,
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i * sizeof(target_ulong),
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i * REG_SIZE,
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buf);
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}
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