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mmu-hash*: Cleanup segment-level NX check

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On the ppc hash mmus, no-execute can be set at the segment level (on more
recent 64-bit hash mmus it can also be set at the page level).  This patch
separates out this check to make it clearer what is going on, and avoiding
excessive indentation of the remaining translation code.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
David Gibson 2013-03-12 00:31:26 +00:00 committed by Alexander Graf
parent 723ed73ada
commit bb218042c8
2 changed files with 84 additions and 84 deletions
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14
target-ppc/mmu-hash32.c
View File

@ -466,10 +466,16 @@ static int ppc_hash32_translate(CPUPPCState *env, struct mmu_ctx_hash32 *ctx,
&ctx->raddr, &ctx->prot);
}
/* 5. Check for segment level no-execute violation */
ctx->nx = !!(sr & SR32_NX);
if ((rwx == 2) && ctx->nx) {
return -3;
}
pr = msr_pr;
ctx->key = (((sr & SR32_KP) && (pr != 0)) ||
((sr & SR32_KS) && (pr == 0))) ? 1 : 0;
ctx->nx = !!(sr & SR32_NX);
vsid = sr & SR32_VSID;
target_page_bits = TARGET_PAGE_BITS;
LOG_MMU("Check segment v=" TARGET_FMT_lx " %d " TARGET_FMT_lx " nip="
@ -485,8 +491,6 @@ static int ppc_hash32_translate(CPUPPCState *env, struct mmu_ctx_hash32 *ctx,
ctx->key, ctx->nx, vsid);
ret = -1;
/* Check if instruction fetch is allowed, if needed */
if (rwx != 2 || ctx->nx == 0) {
/* Page address translation */
LOG_MMU("htab_base " TARGET_FMT_plx " htab_mask " TARGET_FMT_plx
" hash " TARGET_FMT_plx "\n",
@ -534,10 +538,6 @@ static int ppc_hash32_translate(CPUPPCState *env, struct mmu_ctx_hash32 *ctx,
}
}
#endif
} else {
LOG_MMU("No access allowed\n");
ret = -3;
}
return ret;
}

18
target-ppc/mmu-hash64.c
View File

@ -454,14 +454,20 @@ static int ppc_hash64_translate(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
return 0;
}
pr = msr_pr;
LOG_MMU("Check SLBs\n");
/* 2. Translation is on, so look up the SLB */
slb = slb_lookup(env, eaddr);
if (!slb) {
return -5;
}
/* 3. Check for segment level no-execute violation */
if ((rwx == 2) && (slb->vsid & SLB_VSID_N)) {
return -3;
}
pr = msr_pr;
if (slb->vsid & SLB_VSID_B) {
vsid = (slb->vsid & SLB_VSID_VSID) >> SLB_VSID_SHIFT_1T;
segment_bits = 40;
@ -490,8 +496,6 @@ static int ppc_hash64_translate(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
ctx->key, !!(slb->vsid & SLB_VSID_N), vsid);
ret = -1;
/* Check if instruction fetch is allowed, if needed */
if (rwx != 2 || !(slb->vsid & SLB_VSID_N)) {
/* Page address translation */
LOG_MMU("htab_base " TARGET_FMT_plx " htab_mask " TARGET_FMT_plx
" hash " TARGET_FMT_plx "\n",
@ -519,10 +523,6 @@ static int ppc_hash64_translate(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
ret = ret2;
}
}
} else {
LOG_MMU("No access allowed\n");
ret = -3;
}
return ret;
}