From bb928dbef23c7202dcad43aa3efa580ed5c68072 Mon Sep 17 00:00:00 2001
From: aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sat, 11 Apr 2009 18:43:20 +0000
Subject: [PATCH] target-mips: don't map zero register as a TCG global

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7094 c046a42c-6fe2-441c-8c8c-71466251a162
---
 target-mips/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-mips/translate.c b/target-mips/translate.c
index f38e576607..7f747d65da 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -8491,7 +8491,7 @@ static void mips_tcg_init(void)
         return;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
-    for (i = 0; i < 32; i++)
+    for (i = 1; i < 32; i++)
         cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
                                         offsetof(CPUState, active_tc.gpr[i]),
                                         regnames[i]);