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target-tricore: add SYS_RESTORE instruction of the v1.6 ISA 

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Bastian Koppelmann 2015-05-07 21:25:42 +02:00
parent e5c96c82bc
commit bc3551c433
2 changed files with 11 additions and 0 deletions
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10
target-tricore/translate.c
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@ -7792,10 +7792,12 @@ static void decode_rrrw_extract_insert(CPUTriCoreState *env, DisasContext *ctx)
static void decode_sys_interrupts(CPUTriCoreState *env, DisasContext *ctx)
{
uint32_t op2;
uint32_t r1;
TCGLabel *l1;
TCGv tmp;
op2 = MASK_OP_SYS_OP2(ctx->opcode);
r1 = MASK_OP_SYS_S1D(ctx->opcode);
switch (op2) {
case OPC2_32_SYS_DEBUG:
@ -7844,6 +7846,14 @@ static void decode_sys_interrupts(CPUTriCoreState *env, DisasContext *ctx)
case OPC2_32_SYS_SVLCX:
gen_helper_svlcx(cpu_env);
break;
case OPC2_32_SYS_RESTORE:
if (tricore_feature(env, TRICORE_FEATURE_16)) {
if ((ctx->hflags & TRICORE_HFLAG_KUU) == TRICORE_HFLAG_SM ||
(ctx->hflags & TRICORE_HFLAG_KUU) == TRICORE_HFLAG_UM1) {
tcg_gen_deposit_tl(cpu_ICR, cpu_ICR, cpu_gpr_d[r1], 8, 1);
} /* else raise privilege trap */
} /* else raise illegal opcode trap */
break;
case OPC2_32_SYS_TRAPSV:
/* TODO: raise sticky overflow trap */
break;

1
target-tricore/tricore-opcodes.h
View File

@ -1434,4 +1434,5 @@ enum {
OPC2_32_SYS_SVLCX = 0x08,
OPC2_32_SYS_TRAPSV = 0x15,
OPC2_32_SYS_TRAPV = 0x14,
OPC2_32_SYS_RESTORE = 0x0e,
};