OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

target/riscv: Move/refactor ISA extension checks

Browse Source 
We should separate "check" and "configure" steps as possible.
This commit separates both steps except vector/Zfinx-related checks.

Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <c3145fa37a529484cf3047c8cb9841e9effad4b0.1652583332.git.research_trasio@irq.a4lg.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Tsukasa OI 2022-05-15 11:56:11 +09:00 committed by Alistair Francis
parent 1086504c6f
commit bc57381669
1 changed files with 16 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
target/riscv/cpu.c
View File

@ -630,14 +630,27 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
return;
}
if ((cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) && !cpu->cfg.ext_f) {
error_setg(errp, "Zve32f/Zve64f extensions require F extension");
return;
}
/* Set the ISA extensions, checks should have happened above */
if (cpu->cfg.ext_zdinx || cpu->cfg.ext_zhinx ||
cpu->cfg.ext_zhinxmin) {
cpu->cfg.ext_zfinx = true;
}
if (cpu->cfg.ext_zfinx && !cpu->cfg.ext_icsr) {
error_setg(errp, "Zfinx extension requires Zicsr");
return;
if (cpu->cfg.ext_zfinx) {
if (!cpu->cfg.ext_icsr) {
error_setg(errp, "Zfinx extension requires Zicsr");
return;
}
if (cpu->cfg.ext_f) {
error_setg(errp,
"Zfinx cannot be supported together with F extension");
return;
}
}
if (cpu->cfg.ext_zk) {
@ -663,7 +676,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
cpu->cfg.ext_zksh = true;
}
/* Set the ISA extensions, checks should have happened above */
if (cpu->cfg.ext_i) {
ext |= RVI;
}
@ -734,20 +746,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
}
set_vext_version(env, vext_version);
}
if ((cpu->cfg.ext_zve32f || cpu->cfg.ext_zve64f) && !cpu->cfg.ext_f) {
error_setg(errp, "Zve32f/Zve64f extension depends upon RVF.");
return;
}
if (cpu->cfg.ext_j) {
ext |= RVJ;
}
if (cpu->cfg.ext_zfinx && ((ext & (RVF | RVD)) || cpu->cfg.ext_zfh ||
cpu->cfg.ext_zfhmin)) {
error_setg(errp,
"'Zfinx' cannot be supported together with 'F', 'D', 'Zfh',"
" 'Zfhmin'");
return;
}
set_misa(env, env->misa_mxl, ext);
}