sh4: implement missing mmaped TLB read functions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
parent
9f97309a70
commit
bc656a2968
15
hw/sh7750.c
15
hw/sh7750.c
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@ -625,6 +625,7 @@ static uint32_t invalid_read(void *opaque, target_phys_addr_t addr)
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static uint32_t sh7750_mmct_readl(void *opaque, target_phys_addr_t addr)
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{
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SH7750State *s = opaque;
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uint32_t ret = 0;
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switch (MM_REGION_TYPE(addr)) {
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@ -633,19 +634,21 @@ static uint32_t sh7750_mmct_readl(void *opaque, target_phys_addr_t addr)
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/* do nothing */
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break;
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case MM_ITLB_ADDR:
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ret = cpu_sh4_read_mmaped_itlb_addr(s->cpu, addr);
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break;
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case MM_ITLB_DATA:
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/* XXXXX */
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abort();
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break;
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ret = cpu_sh4_read_mmaped_itlb_data(s->cpu, addr);
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break;
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case MM_OCACHE_ADDR:
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case MM_OCACHE_DATA:
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/* do nothing */
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break;
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case MM_UTLB_ADDR:
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ret = cpu_sh4_read_mmaped_utlb_addr(s->cpu, addr);
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break;
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case MM_UTLB_DATA:
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/* XXXXX */
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abort();
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break;
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ret = cpu_sh4_read_mmaped_utlb_data(s->cpu, addr);
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break;
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default:
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abort();
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}
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@ -201,12 +201,20 @@ void do_interrupt(CPUSH4State * env);
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void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf);
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#if !defined(CONFIG_USER_ONLY)
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void cpu_sh4_invalidate_tlb(CPUSH4State *s);
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uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,
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target_phys_addr_t addr);
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void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value);
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uint32_t cpu_sh4_read_mmaped_itlb_data(CPUSH4State *s,
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target_phys_addr_t addr);
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void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value);
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uint32_t cpu_sh4_read_mmaped_utlb_addr(CPUSH4State *s,
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target_phys_addr_t addr);
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void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value);
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uint32_t cpu_sh4_read_mmaped_utlb_data(CPUSH4State *s,
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target_phys_addr_t addr);
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void cpu_sh4_write_mmaped_utlb_data(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value);
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#endif
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@ -567,6 +567,17 @@ void cpu_load_tlb(CPUSH4State * env)
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tlb_flush(s, 1);
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}
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uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s,
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target_phys_addr_t addr)
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{
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int index = (addr & 0x00000300) >> 8;
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tlb_t * entry = &s->itlb[index];
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return (entry->vpn << 10) |
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(entry->v << 8) |
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(entry->asid);
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}
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void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value)
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{
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@ -586,6 +597,29 @@ void cpu_sh4_write_mmaped_itlb_addr(CPUSH4State *s, target_phys_addr_t addr,
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entry->v = v;
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}
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uint32_t cpu_sh4_read_mmaped_itlb_data(CPUSH4State *s,
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target_phys_addr_t addr)
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{
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int array = (addr & 0x00800000) >> 23;
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int index = (addr & 0x00000300) >> 8;
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tlb_t * entry = &s->itlb[index];
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if (array == 0) {
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/* ITLB Data Array 1 */
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return (entry->ppn << 10) |
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(entry->v << 8) |
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(entry->pr << 5) |
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((entry->sz & 1) << 6) |
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((entry->sz & 2) << 4) |
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(entry->c << 3) |
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(entry->sh << 1);
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} else {
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/* ITLB Data Array 2 */
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return (entry->tc << 1) |
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(entry->sa);
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}
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}
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void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value)
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{
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@ -614,6 +648,19 @@ void cpu_sh4_write_mmaped_itlb_data(CPUSH4State *s, target_phys_addr_t addr,
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}
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}
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uint32_t cpu_sh4_read_mmaped_utlb_addr(CPUSH4State *s,
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target_phys_addr_t addr)
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{
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int index = (addr & 0x00003f00) >> 8;
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tlb_t * entry = &s->utlb[index];
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increment_urc(s); /* per utlb access */
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return (entry->vpn << 10) |
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(entry->v << 8) |
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(entry->asid);
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}
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void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value)
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{
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@ -686,6 +733,33 @@ void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr,
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}
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}
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uint32_t cpu_sh4_read_mmaped_utlb_data(CPUSH4State *s,
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target_phys_addr_t addr)
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{
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int array = (addr & 0x00800000) >> 23;
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int index = (addr & 0x00003f00) >> 8;
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tlb_t * entry = &s->utlb[index];
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increment_urc(s); /* per utlb access */
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if (array == 0) {
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/* ITLB Data Array 1 */
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return (entry->ppn << 10) |
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(entry->v << 8) |
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(entry->pr << 5) |
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((entry->sz & 1) << 6) |
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((entry->sz & 2) << 4) |
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(entry->c << 3) |
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(entry->d << 2) |
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(entry->sh << 1) |
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(entry->wt);
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} else {
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/* ITLB Data Array 2 */
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return (entry->tc << 1) |
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(entry->sa);
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}
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}
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void cpu_sh4_write_mmaped_utlb_data(CPUSH4State *s, target_phys_addr_t addr,
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uint32_t mem_value)
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{
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