target: e2k: Fix ctpr size.

target/e2k/cpu.h

@@ -374,8 +374,21 @@ typedef struct {
     E2KAad ds[32];
     uint32_t ldi[64];
     E2KAalda lda[64];
+    uint64_t pib[64];
 } E2KAauState;
 
+typedef union {
+    struct {
+        uint64_t base: 48;      /* 47:0 */
+        uint64_t unused1: 6;    /* 53:48 */
+        uint64_t tag: 3;        /* 56:54 */
+        uint64_t opc: 2;        /* 58:57 */
+        uint64_t ipd: 2;        /* 60:59 */
+        uint64_t unused2: 3;    /* 63:61 */
+    };
+    uint64_t raw;
+} E2KCtpr;
+
 typedef struct {
 typedef struct CPUArchState {
     /* register file */
@@ -404,7 +417,7 @@ typedef struct CPUArchState {
     uint64_t usd_hi;
 
     /* control registers */
-    target_ulong ctprs[3]; // Control Transfer Preparation Register (CTPR)
+    E2KCtpr ctprs[3]; // Control Transfer Preparation Register (CTPR)
     target_ulong ct_cond;
     
     union {

target/e2k/gdbstub.c

@@ -161,9 +161,9 @@ int e2k_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
     case 336: return gdb_get_reg64(mem_buf, 0); // bgr
     case 337: return gdb_get_reg64(mem_buf, 0); // unk
     case 338: return gdb_get_reg64(mem_buf, 0); // nip
-    case 339: return gdb_get_reg64(mem_buf, env->ctprs[0]); // ctpr1
-    case 340: return gdb_get_reg64(mem_buf, env->ctprs[1]); // ctpr2
-    case 341: return gdb_get_reg64(mem_buf, env->ctprs[2]); // ctpr3
+    case 339: return gdb_get_reg64(mem_buf, env->ctprs[0].raw); // ctpr1
+    case 340: return gdb_get_reg64(mem_buf, env->ctprs[1].raw); // ctpr2
+    case 341: return gdb_get_reg64(mem_buf, env->ctprs[2].raw); // ctpr3
     case 342: return gdb_get_reg64(mem_buf, 0); // eir
     case 343: return gdb_get_reg64(mem_buf, 0); // tr
     case 344: return gdb_get_reg64(mem_buf, 0); // cutd

target/e2k/helper.c

@@ -11,8 +11,7 @@ static inline void reset_ctprs(CPUE2KState *env)
     unsigned int i;
 
     for (i = 0; i < 3; i++) {
-        env->ctprs[i] = SET_FIELD(env->ctprs[i], CTPR_TAG_NONE,
-            CTPR_TAG_OFF, CTPR_TAG_LEN);
+        env->ctprs[i].tag = CTPR_TAG_NONE;
     }
 }
 
@@ -194,7 +193,8 @@ static inline void do_call(CPUE2KState *env, int wbs, target_ulong pc_next)
 
 uint64_t helper_prep_return(CPUE2KState *env, int ipd)
 {
-    uint64_t pc, ret = 0;
+    uint64_t pc;
+    E2KCtpr ret = { 0 };
     void *p;
 
     if (env->pcsp.index < 32) {
@@ -204,11 +204,12 @@ uint64_t helper_prep_return(CPUE2KState *env, int ipd)
 
     p = (void *) env->pcsp.base + env->pcsp.index - 24;
     memcpy(&pc, p, 8);
-    ret |= deposit64(ret, CTPR_BASE_OFF, CTPR_BASE_LEN, pc);
-    ret |= deposit64(ret, CTPR_TAG_OFF, CTPR_TAG_LEN, CTPR_TAG_RETURN);
-    ret |= deposit64(ret, CTPR_IPD_OFF, CTPR_IPD_LEN, ipd);
 
-    return ret;
+    ret.base = pc;
+    ret.tag = CTPR_TAG_RETURN;
+    ret.ipd = ipd;
+
+    return ret.raw;
 }
 
 void helper_return(CPUE2KState *env)
@@ -240,15 +241,15 @@ static inline void do_syscall(CPUE2KState *env, int call_wbs,
     helper_raise_exception(env, E2K_EXCP_SYSCALL);
 }
 
-void helper_call(CPUE2KState *env, uint64_t ctpr, int call_wbs,
+void helper_call(CPUE2KState *env, uint64_t ctpr_raw, int call_wbs,
     target_ulong pc_next)
 {
-    int ctpr_tag = extract64(ctpr, CTPR_TAG_OFF, CTPR_TAG_LEN);
+    E2KCtpr ctpr = { .raw = ctpr_raw };
 
-    switch (ctpr_tag) {
+    switch (ctpr.tag) {
     case CTPR_TAG_DISP:
         do_call(env, call_wbs, pc_next);
-        env->ip = extract64(ctpr, CTPR_BASE_OFF, CTPR_BASE_LEN);
+        env->ip = ctpr.base;
         break;
     case CTPR_TAG_SDISP:
         do_syscall(env, call_wbs, pc_next);

target/e2k/translate.c

@@ -516,7 +516,7 @@ void e2k_tcg_initialize(void) {
     for (i = 0; i < 3; i++) {
         snprintf(buf, ARRAY_SIZE(buf), "%%ctpr%d", i + 1);
         e2k_cs.ctprs[i] = tcg_global_mem_new_i64(cpu_env,
-            offsetof(CPUE2KState, ctprs[i]), buf);
+            offsetof(CPUE2KState, ctprs[i].raw), buf);
     }
 
     for (i = 0; i < 16; i++) {

target/e2k/translate.h

@@ -58,7 +58,7 @@ typedef enum {
 typedef struct CPUE2KStateTCG {
     TCGv pc;
     TCGv npc;
-    TCGv ctprs[3];
+    TCGv_i64 ctprs[3];
     TCGv ct_cond;
     TCGv_i32 is_bp; /* breakpoint flag */
     TCGv_i64 lsr;